CPC7592
control and external “All-off” control is not affected by
2.7 Power Supplies
the state of the LATCH enable input, T will override
state control.
Both a +5 V supply and battery voltage are connected
to the CPC7592. Switch state control is powered
exclusively by the +5 V supply. As a result, the
CPC7592 exhibits extremely low power consumption
during active and idle states.
SD
2.5 T Pin Description
SD
The T pin is a bi-directional I/O structure with an
SD
internal pull-up current source with a nominal value of
Although battery power is not used for switch control, it
is required to supply trigger current for the integrated
internal protection circuitry SCR during fault
16 μA biased from V . As an output, this pin
DD
indicates the status of the thermal shutdown circuitry.
Typically, during normal operation, this pin will be
conditions. This integrated SCR is designed to
pulled up to V but under fault conditions that create
DD
activate whenever the voltage at T
or R
drops 2
BAT
BAT
excess thermal loading the CPC7592 will enter
thermal shutdown and a logic low will be output.
to 4 V below the applied voltage on the V
pin.
BAT
Because the battery supply at this pin is required to
source trigger current during negative overvoltage
fault conditions at tip and ring, it is important that the
net supplying this current be a low impedance path for
high speed transients such as lightning. This will
permit trigger currents to flow enabling the SCR to
activate and thereby prevent a fault induced negative
As an input, the T pin is utilized to place the
SD
CPC7592 into the “All-Off” state by simply pulling the
input low. For applications using low-voltage logic
devices (lower than V ), Clare recommends the use
DD
of an open-collector or an open-drain type output to
control T . This avoids sinking the T pull up bias
SD
SD
overvoltage event at the T
or R
nodes.
BAT
BAT
current to ground during normal operation when the
all-off state is not required. In general, Clare
recommends all applications use an open-collector or
open-drain type device to drive this pin.
2.8 Battery Voltage Monitor
The CPC7592 also uses the V
voltage to monitor
BAT
battery voltage. If system battery voltage is lost, the
CPC7592 immediately enters the all-off state. It
remains in this state until the battery voltage is
restored. The device also enters the all-off state if the
battery voltage rises more positive than about –10 V
with respect to ground and remains in the all-off state
until the battery voltage drops below approximately
–15 V with respect to ground. This battery monitor
feature draws a small current from the battery (less
than 1 μA typical) and will add slightly to the device’s
overall power dissipation.
Setting T to a logic 1 or tying this pin to V allows
SD
CC
switch control using the logic inputs. This setting,
however, also disables the thermal shutdown circuit
and is therefore not recommended. As a result the
T
pin has two recommended operating states when
SD
it is used as an input control. A logic 0, which forces
the device to the all-off state and a high impedance (Z)
state for normal operation. This requires the use of an
open-collector or open-drain type buffer.
2.6 Ringing Switch Zero-Cross Current Turn Off
After the application of a logic input to turn SW4 off,
the ringing switch is designed to delay the change in
state until the next zero-crossing. Once on, the switch
requires a zero-current cross to turn off, and therefore
should not be used to switch a pure DC signal. The
switch will remain in the on state no matter the logic
input until the next zero crossing. These switching
characteristics will reduce and possibly eliminate
overall system impulse noise normally associated with
ringing switches. See Clare’s application note AN-144,
Impulse Noise Benefits of Line Card Access Switches for
more information. The attributes of ringing switch SW4
may make it possible to eliminate the need for a
zero-cross switching scheme. A minimum impedance
of 300 Ω in series with the ringing generator is
recommended.
This monitor function performs properly if the
CPC7592 and SLIC share a common battery supply
origin. Otherwise, if battery is lost to the CPC7592 but
not to the SLIC, then the V
pin will be internally
BAT
biased by the potential applied at the T
or R
BAT
BAT
pins via the internal protection circuitry SCR trigger
current path.
2.9 Protection
2.9.1 Diode Bridge/SCR
The CPC7592 uses a combination of current limited
break switches, a diode bridge/SCR clamping circuit,
and a thermal shutdown mechanism to protect the
SLIC device or other associated circuitry from damage
during line transient events such as lightning. During a
positive transient condition, the fault current is
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