EP9315
Enhanced Universal Platform SOC Processor
The following section focuses on the EP9315 pin signals
Under the Pad Type column:
from two viewpoints
- the pin usage and pad
•
•
•
•
•
•
•
•
A - Analog pad
characteristics, and the pin multiplexing usage. The first
table (Table S) is a summary of all the EP9315 pin
signals. The second table (Table T) illustrates the pin
signal multiplexing and configuration options.
P - Power pad
G - Ground pad
I - Pin is an input only
I/O - Pin is input/output
4mA - Pin is a 4 mA output driver
8mA - Pin is an 8 mA output driver
12mA - Pin is an 12 mA output driver
Table S is a summary of the EP9315 pin signals, which
illustrates the pad type and pad pull type (if any). The
symbols used in the table are defined as follows. (Note: A
blank box means Not Applicable (NA) or, for Pull Type,
No Pull (NP).)
See the text description for additional information about
bi-directional pins.
Under the Pull Type Column:
•
•
PU - Resistor is a pull up to the RVDD supply
PD - Resistor is a pull down to the RGND supply
.
Table S. Pin Descriptions (Continued)
Table S. Pin Descriptions
Pad
Type
Pull
Type
Pin Name
SPCLK
Block
Description
Pad
Type
Pull
Type
Pin Name
TCK
Block
Description
Raster
Raster
12ma
8ma
PU Pixel clock in/out
JTAG
JTAG
I
PD JTAG clock in
PD JTAG data in
JTAG data out
HSYNC
PU Horizontal synchronization / line pulse out
TDI
I
Vertical or composite synchronization / frame
pulse out
V_CSYNC
Raster
8ma
PU
TDO
JTAG
4ma
I
TMS
JTAG
PD JTAG test mode select
PD JTAG reset
BLANK
BRIGHT
PWMOUT
Xp, Xm
Yp, Ym
sXp, sXm
sYp, sYm
VDD_ADC
GND_ADC
COL[7:0]
ROW[7:0]
USBp[2:0]
USBm[2:0]
TXD0
Raster
Raster
PWM
ADC
8ma
4ma
8ma
A
PU Composite blanking signal out
PWM brightness control out
Pulse width modulator output
Touchscreen ADC X axis
Touchscreen ADC Y axis
Touchscreen ADC X axis feedback
Touchscreen ADC Y axis feedback
Touchscreen ADC power, 3.3V
Touchscreen ADC ground
PU Key matrix column inputs
PU Key matrix row outputs
USB positive signals
TRSTn
JTAG
I
BOOT[1:0]
XTALI
System
PLL
I
PD Boot mode select in
Main oscillator input
A
XTALO
VDD_PLL
GND_PLL
RTCXTALI
RTCXTALO
WRn
PLL
A
Main oscillator output
Main oscillator power, 1.8V
Main oscillator ground
RTC oscillator input
ADC
A
PLL
P
ADC
A
PLL
G
ADC
A
RTC
A
ADC
P
RTC
A
RTC oscillator output
SRAM Write strobe out
SRAM Read / OE strobe out
PU SRAM Wait in
ADC
G
EBUS
EBUS
EBUS
EBUS
EBUS
EBUS
EBUS
EBUS
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
Raster
4ma
4ma
I
Key
8ma
8ma
A
RDn
Key
WAITn
USB
AD[25:0]
DA[31:0]
CSn[3:0]
CSn[7:6]
DQMn[3:0]
SDCLK
SDCLKEN
SDCSn[3:0]
RASn
8ma
8ma
4ma
4ma
8ma
8ma
8ma
4ma
8ma
8ma
8ma
4ma
Shared Address bus out
PU Shared Data bus in/out
PU Chip select out
PU Chip select out
Shared data mask out
SDRAM clock out
USB
A
USB negative signals
UART1
UART1
UART1
UART1
UART1
UART1
UART2
UART2
UART3
UART3
EMAC
4ma
I
Transmit out
RXD0
PU Receive in
CTSn
I
PU Clear to send / transmit enable
PU Data set ready / Data Carrier Detect
Data Terminal Ready output
Ready to send
DSRn
I
DTRn
4ma
4ma
4ma
I
SDRAM clock enable out
SDRAM chip selects out
SDRAM RAS out
RTSn
TXD1
Transmit / IrDA output
RXD1
PU Receive / IrDA input
Transmit
CASn
SDRAM CAS out
TXD2
4ma
I
SDWEn
P[17:0]
SDRAM write enable out
PU Pixel data bus out
RXD2
PU Receive
MDC
4ma
Management data clock
60
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