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CS8900A-IQZ 参数 Datasheet PDF下载

CS8900A-IQZ图片预览
型号: CS8900A-IQZ
PDF下载: 下载PDF文件 查看货源
内容描述: 水晶局域网? ISA以太网控制器 [Crystal LAN ⑩ ISA Ethernet Controller]
分类和应用: 微控制器和处理器串行IO控制器通信控制器外围集成电路PC局域网以太网时钟
文件页数/大小: 138 页 / 2374 K
品牌: CIRRUS [ CIRRUS LOGIC ]
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CS8900A  
Crystal LAN™ Ethernet Controller  
The IAHashA, MulticastA, IndividualA, and  
BroadcastA bits are used independently. As a  
result, many DA filter combinations are possi-  
ble. For example, if MulticastA and IndividualA  
are set, then all frames that are either Multicast  
or Individual Address frames are accepted.  
The PromiscuousA bit, when set, overrides the  
other four DA bits, and allows all valid frames  
to be accepted. Table 25 summarizes the con-  
figuration options available for DA filtering.  
IAHashA  
PromiscuousA MulticastA IndividualA  
BroadcastA  
Frames Accepted  
0
0
0
0
0
0
1
1
0
0
0
Individual Address frames with  
DA matching the IA at Pack-  
etPage base + 0158h  
1
0
0
0
Individual Address frames with  
DA that pass the hash filter  
(DA[0] must be “0”)  
Multicast frames with DA that  
pass the hash filter (DA[0] must  
be “1”)  
0
0
1
0
0
1
Broadcast frames  
All frames  
X
X
X
X
Table 25. DA Filtering Options  
It may become necessary for the host to 5.2.12.1 Hash Filter Operation  
change the Destination Address (DA) filter cri-  
teria without resetting the CS8900A. This can  
be done as follows:  
See Figure 23. The DA of the incoming frame  
is passed through the CRC logic, generating a  
32-bit CRC value. The six most-significant bits  
of the CRC are latched into the 6-bit hash reg-  
ister (HR). The contents of the HR are passed  
through a 6-to-64-bit decoder, asserting one of  
the decoder's outputs. The asserted output is  
compared with a corresponding bit in the 64-  
bit Logical Address Filter, located at Pack-  
etPage base + 0150h. If the decoder output  
and the Logical Address Filter bit match, the  
frame passes the hash filter and the Hashed  
bit (Register 4, RxEvent, Bit 9) is set. If the two  
do not match, the frame fails the filter and the  
Hashed bit is clear.  
1) Clear SerRxON (Register 13, LineCTL, Bit  
6) to prevent any additional receive frames  
while the filter is being changed.  
2) Modify the DA filter bits (B, A, 9, 7, and 6)  
in the RxCTL register. Modify the Logical  
Address Filter at PacketPage base +  
0150h, if necessary. Modify the Individual  
Address at PacketPage base + 0158h, if  
necessary.  
3) Set SerRxON to re-enable the receiver.  
Because the receiver has been disabled, the  
CS8900A will ignore frames while the host is  
changing the DA filter.  
Whenever the hash filter is passed by a "good"  
frame, the RxOK bit (Register 4, RxEvent, Bit  
8) is set and the bits in the HR are mapped to  
the Hash Table Index bits (Register 4, Rx-  
Event, Bits A through F).  
5.2.12 Hash Filter  
The hash filter is used to help determine which  
Multicast frames and which Individual Address  
frames should be accepted by the CS8900A.  
CIRRUS LOGIC PRODUCT DATASHEET  
88  
DS271F4