CS8900A
Crystal LAN™ ISA Ethernet Controller
etPage base + 0A00h) are directly accessible. See
Section 4.7 on page 73.
4.2 PacketPage Memory Map
Table 12 shows the CS8900A PacketPage memory
address map: s
PacketPage # of
Address Bytes
Type
Description
Cross Reference
Bus Interface Registers
0000h
0004h
0020h
4
28
2
Read-only Product Identification Code
Reserved
Section 4.3 on page 42
-
Note 2
Read/Write I/O Base Address
Section 4.3 on page 42,
Section 4.7 on page 73
0022h
0024h
0026h
0028h
002Ah
002Ch
0030h
0034h
2
2
2
2
2
4
4
4
Read/Write Interrupt Number (0,1,2,or 3)
Read/Write DMA Channel Number (0, 1, or 2)
Read-only DMA Start of Frame
Section 3.2 on page 18,
Section 4.3 on page 42
Section 3.2 on page 18,
Section 4.3 on page 42
Section 4.3 on page 42,
Section 5.4 on page 90
Read-only DMA Frame Count (12 Bits)
Read-only RxDMA Byte Count
Sections Section 4.3 on page 42,
”Receive DMA”
Section 4.3 on page 42,
Section 5.4 on page 90
Read/Write Memory Base Address Register
(20 Bit)
Section 4.3 on page 42,
Section 4.9 on page 74
Read/Write Boot PROM Base Address
Section 3.6 on page 25,
Section 4.3 on page 42
Read/Write Boot PROM Address Mask
Section 3.6 on page 25,
Section 4.3 on page 42
0038h
0040h
8
2
-
Reserved
Note 2
Read/Write EEPROM Command
Section 3.5 on page 24,
Section 4.3 on page 42
0042h
2
Read/Write EEPROM Data
Section 3.5 on page 24,
Section 4.3 on page 42
0044h
0050h
12
2
-
Reserved
Note 2
Read only Received Frame Byte Counter
Section 4.3 on page 42,
Section 5.2.9 on page 87
0052h
174
-
Reserved
Note 2
Status and Control Registers
0100h
0120h
0140h
32 Read/Write Configuration & Control Registers
(2 bytes per regiseter)
Section 4.4 on page 47
Section 4.4 on page 47
Note 2
32
Read-only Status & Event Registers
(2 bytes per register)
4
-
Reserved
Initiate Transmit Registers
Notes: 1. All registers are accessed as words only.
2. Read operation from the reserved location provides undefined data. Writing to a reserved location or
undefined bits may result in unpredictable operation of the CS8900A.
Table 12. PacketPage Memory Address Map
CIRRUS LOGIC PRODUCT DATA SHEET
DS271PP3
40