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CS8900A-IQ 参数 Datasheet PDF下载

CS8900A-IQ图片预览
型号: CS8900A-IQ
PDF下载: 下载PDF文件 查看货源
内容描述: 水晶局域网? ISA以太网控制器 [Crystal LAN ⑩ ISA Ethernet Controller]
分类和应用: 控制器局域网以太网
文件页数/大小: 128 页 / 1360 K
品牌: CIRRUS [ CIRRUS LOGIC ]
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CS8900A  
Crystal LAN™ ISA Ethernet Controller  
sion, or if the Carrier Sense signal is deasserted ed by an external Ethernet transceiver whenever a  
before the end of the transmission, there is a Loss- collision is detected on the Ethernet segment. (Sec-  
of-Carrier error and the Loss-of-CRS bit (Register  
8, TxEvent, Bit 6) is set.  
tion 7.3.1.2 of ISO/IEC 8802-3, 1993, defines the  
collision signal as a 10 MHz ± 15% signal with a  
duty cycle no worse than 60/40). When a collision  
is present, the AUI Collision circuit informs the  
MAC by asserting the internal Collision signal.  
3.12.2 AUI Receiver  
The AUI receiver is a differential pair circuit that  
connects directly to the DI+/DI- pins. It is designed  
to distinguish between transient noise pulses and  
incoming Ethernet packets. Incoming packets with  
proper amplitude and pulse width are passed on to  
the ENDEC section, while unwanted noise is re-  
jected.  
3.13 External Clock Oscillator  
A 20-MHz quartz crystal or CMOS clock input is  
required by the CS8900A. If a CMOS clock input  
is used, it should be connected the to XTAL1 pin,  
with the XTAL2 pin left open. The clock signal  
should be 20 MHz ±0.01% with a duty cycle be-  
tween 40% and 60%. The specifications for the  
crystal are described in Section 7.7 on page 121.  
3.12.3 Collision Detection  
The AUI collision circuit is a differential pair re-  
ceiver that detects the presence of collision signals  
on the CI+/CI- pins. The collision signal is generat-  
CIRRUS LOGIC PRODUCT DATA SHEET  
38  
DS271PP3