CS8900A
Crystal LAN™ ISA Ethernet Controller
ed by more than 2 to 7 ms and no more than 25 to asserting the internal Collision signal (see
150 ms (see Section 7.4 on page 113 for 10BASE-
T timing).
Section 3.9 on page 28 for collision handling).
3.12 Attachment Unit Interface (AUI)
The state of the link segment is reported in the
LinkOK bit (Register 14, LineST, Bit 7). If the
HC0E bit (Register 15, SelfCTL, Bit D) is clear, it
is also indicated by the output of the LINKLED
pin. If the link is "good", the LinkOK bit is set and
the LINKLED pin is driven low. If the link is "bad"
the LinkOK bit is clear and the LINKLED pin is
high. To disable this feature, the host must set the
DisableLT bit (Register 19, TestCTL, Bit 7). If
DisableLT is set, the CS8900A will transmit and
receive packets independent of the link segment.
The CS8900A Attachment Unit Interface (AUI)
provides a direct interface to external 10BASE2,
10BASE5, and 10BASE-FL Ethernet transceivers.
It is fully compliant with Section 7 of the Ethernet
standard (ISO/IEC 8802-3), and as such, is capable
of driving a full 50-meter AUI cable.
The AUI consists of three pairs of signals: Data Out
(DO+/DO-), Data In (DI+/DI-), and Collision In
(CI+/CI-). To select the AUI, the host should set
the AUI bit (Register 13, LineCTL, Bit 8). The AUI
can also be selected automatically as described in
the previous section (Section 3.10.4 on page 35).
Figure 15 provides a block diagram of the AUI.
(For a connection diagram, see Section 7.6 on
page 121).
3.11.5 Receive Polarity Detection and Correction
The CS8900A automatically checks the polarity of
the receive half of the twisted pair cable. If the po-
larity is correct, the PolarityOK bit (Register 14,
LineST, bit C) is set. If the polarity is reversed, the
PolarityOK bit is clear. If the PolarityDis bit (Reg-
ister 13, LineCTL, Bit C) is clear, the CS8900A au-
tomatically corrects a reversal. If the PolarityDis
bit is set, the CS8900A does not correct a reversal.
The PolarityOK bit and the PolarityDis bit are in-
dependent.
AUI
Collision
Detect
CL+
CL-
AUICol (to MAC)
AUIRX
-
+
DI+
DI-
AUISQL
AUITX
ENDEC
-
+
To detect a reversed pair, the receiver examines re-
ceived link pulses and the End-of-Frame (EOF) se-
quence of incoming packets. If it detects at least
one reversed link pulse and at least four frames in a
row with negative polarity after the EOF, the re-
ceive pair is considered reversed. Any data re-
ceived before the correction of the reversal is
ignored.
DO+
DO-
Figure 15. AUI
3.12.1 AUI Transmitter
The AUI transmitter is a differential driver de-
signed to drive a 78 Ω cable. It accepts data from
the ENDEC and transmits it directly on the
DO+/DO- pins. After transmission has started, the
CS8900A expects to see the packet "looped-back"
(or echoed) to the receiver, causing the Carrier
Sense signal to be asserted. This Carrier Sense
presence indicates that the transmit signal is getting
through to the transceiver. If the Carrier Sense sig-
nal remains deasserted throughout the transmis-
3.11.6 Collision Detection
If half-duplex operation is selected (Register 19,
Bit E, FDX), the CS8900A detects a 10BASE-T
collision whenever the receiver and transmitter are
active simultaneously. When a collision is present,
the Collision Detection circuit informs the MAC by
CIRRUS LOGIC PRODUCT DATA SHEET
DS271PP3
37
CIRRUS [ CIRRUS LOGIC ]
