CS5505/6/7/8
CS5505/6/7/8
Figure 14 illustrates the System Connection Dia-
gram for the CS5505/6 using a single +5V
supply. Note that all supply pins are bypassed
with 0.1 µF capacitors and that the VD+ digital
supply is derived from the VA+ supply.
Figure 16 illustrates the CS5505/6 using dual
supplies of +10V analog and +5V digital.
When using separate supplies for VA+ and
VD+, VA+ must be established first. VD+
should never become more positive than VA+
under any operating condition. Remember to in-
vestigate transient power-up conditions, when
one power supply may have a faster rise time.
Figure 15 illustrates the CS5505/6 using dual
supplies of +5 and -5V.
10
Ω
+5V
Analog
Supply
0.1
0.1
µ
F
µ
F
17
20
VA+
VD+
Optional
Clock
Source
5
6
XIN
4
8
Calibration
Control
CAL
XOUT
M/SLP
32.768 kHz
Bipolar/
Unipolar
Input Select
7
Sleep Mode
BP/UP
CS5505/6
AIN1+
AIN2+
AIN3+
AIN4+
Control
and
Output Mode
Select
9
10
12
13
Analog*
Signal
Sources
21
22
Serial
Data
Interface
SCLK
SDATA
11
Signal
Ground
AIN-
23
2
1
*Unused analog inputs
should be tied to AIN-
DRDY
CS
14
Control
Logic
+
VREF+
A0
A1
Voltage
Reference
24
15
16
3
-
VREF-
CONV
DGND
19
VREFOUT
0.1
µ
F
Unused Logic
inputs must be
connected to
VA-
18
-5V
Analog
Supply
VD+ or DGND.
Note: To use the internal 2.5 volt reference see Figure 6.
Figure 15. CS5505/6 System Connection Diagram Using External Reference, Dual Supplies
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