CS5471
ANALOG CHARACTERISTICS (Continued)
Parameter
Symbol
Min
Typ
Max
Unit
Reference Output
Output Voltage
REFOUT
1.15
-
20
6
1.25
50
10
-
V
ppm/°C
mV
Temperature Coefficient
-
-
Load Regulation
(Output Current 1µA Source or Sink)
∆VR
PSRR
Power Supply Rejection
Reference Input
60
-
dB
Input Voltage Range
Input Capacitance
Input CVF Current
Power Supplies
VREF+
1.15
1.2
1.25
10
1
V
-
-
-
-
pF
µA
Power Supply Currents
IA+
ID+
PSCA
PSCD
-
-
-
-
1.5
2.5
mA
mA
Power Consumption
(Note 4)
PC
-
-
-
15
-
mW
dB
Power Supply Rejection
(see Note 5)
(DC, 50, 60 Hz)
PSRR
60
Notes: 4. All outputs unloaded. All inputs CMOS level.
5. Definition for PSRR: VREFIN tied to VREFOUT, VA+ = VD+ = 3V, AGND = DGND = 0V, VA- = -2V
(using charge-pump circuit with CPD). In addition, a 106.07 mV rms (60 Hz) sinewave is imposed onto
the VA+ and VD+ pins. The “+” and “-” input pins of both input channels are shorted to VA-.
Instantaneous digital output data words are then collected for the channel under test. From these data
samples, the rms value (standard deviation) of the digital sinusoidal output signal is calculated, and this
rms value is converted into the rms value of the sinusoidal voltage (measured in mV) that would need
to be applied at the channel’s inputs, in order to cause the same digital sinusoidal output. This voltage
is then defined as Veq. PSRR is then (in dB)
106.07
---------------
PSRR = 20 ⋅ log
Veq
DIGITAL CHARACTERISTICS (TA = -40 °C to +85 °C; +2.7V < VA+ < +3.5V; +2.7V < VD+ < +3.5V;
VA- = -2 V 10%; AGND, DGND = 0.0 V) (See Note 6)
Parameter
Symbol
VIH
Min
0.6 VD+
0.0
Typ
Max
VD+
0.8
-
Unit
V
High-Level Input Voltage
Low-Level Input Voltage
-
-
-
VIL
V
High-Level Output Voltage
Low-Level Output Voltage
I
out = -5.0 mA
Iout = 5.0 mA
(Note 7)
VOH
(VD+) - 1.0
V
VOL
-
-
0.4
V
Input Leakage Current
Iin
-
-
-
1
-
10
10
-
µA
µA
pF
3-State Leakage Current
Digital Output Pin Capacitance
IOZ
Cout
9
Notes: 6. All measurements performed under static conditions.
7. For OWRS and GAIN pins, input leakage current is 30 µA (Max).
4