CS5361
SWITCHING CHARACTERISTICS - SERIAL AUDIO PORT
Logic “0” = GND = 0 V; Logic “1” = VL, C = 20 pF
L
Parameter
Symbol
Min
Typ
Max
Unit
Output Sample Rate
Single Speed Mode
Double Speed Mode
Quad Speed Mode
Fs
Fs
Fs
2
50
100
-
-
-
51
102
204
kHz
kHz
kHz
t
16/f
-
-
-
-
s
s
OVFL to LRCK edge setup time
OVFL to LRCK edge hold time
setup
sclk
t
1/f
hold
sclk
OVFL time-out on overrange condition
Fs = 44.1, 88.2, 176.4 kHz
Fs = 48, 96, 192 kHz
-
-
740
680
-
-
ms
ms
MCLK Specifications
MCLK Period
t
t
38
-
1953
60
ns
%
clkw
MCLK Pulse Duty Cycle
Master Mode
40
50
SCLK falling to LRCK
SCLK falling to SDOUT valid
SCLK Duty Cycle
-20
0
-
-
20
32
-
ns
ns
%
mslr
t
sdo
-
50
Slave Mode
Single Speed
Output Sample Rate
LRCK Duty Cycle
Fs
2
40
153
45
-
-
50
-
51
60
-
kHz
%
SCLK Period
t
ns
%
sclkw
SCLK Duty Cycle
50
-
55
32
20
SCLK falling to SDOUT valid
SCLK falling to LRCK edge
Double Speed
t
ns
ns
dss
t
-20
-
slrd
Output Sample Rate
LRCK Duty Cycle
Fs
50
40
153
45
-
-
50
-
102
60
-
kHz
%
SCLK Period
t
ns
%
sclkw
SCLK Duty Cycle
50
-
55
32
20
SCLK falling to SDOUT valid
SCLK falling to LRCK edge
Quad Speed
t
ns
ns
dss
t
-20
-
slrd
Output Sample Rate
LRCK Duty Cycle
Fs
100
40
77
45
-
-
50
-
204
60
-
kHz
%
SCLK Period
t
ns
%
sclkw
SCLK Duty Cycle
50
-
55
32
3
SCLK falling to SDOUT valid
SCLK falling to LRCK edge
t
ns
ns
dss
t
-8
-
slrd
DS467F2
11