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CS5101A-JL16 参数 Datasheet PDF下载

CS5101A-JL16图片预览
型号: CS5101A-JL16
PDF下载: 下载PDF文件 查看货源
内容描述: 16位, 100kHz的/ 20kHz的A / D转换器 [16-Bit, 100kHz/ 20kHz A/D Converters]
分类和应用: 转换器
文件页数/大小: 40 页 / 461 K
品牌: CIRRUS [ CIRRUS LOGIC ]
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CS5101A  
SWITCHING CHARACTERISTICS (T = T  
to T  
; VA+, VD+ = 5V ± 10%;  
A
MIN  
MAX  
VA-, VD- = -5V ± 10%; Inputs: Logic 0 = 0V, Logic 1 = VD+; C = 50 pF)  
L
Parameter  
Symbol  
Min  
Typ  
Max  
Units  
CLKIN Period  
(Note 4)  
-8  
t
t
108  
250  
-
-
10,000  
10,000  
ns  
ns  
clk  
-16  
clk  
CLKIN Low Time  
CLKIN High Time  
Crystal Frequency  
t
37.5  
37.5  
-
-
-
-
ns  
ns  
clkl  
t
clkh  
(Note 13)  
-8  
-16  
f
2.0  
2.0  
-
-
9.216  
4.0  
MHz  
MHz  
xtal  
f
xtal  
SLEEP Rising to Oscillator Stable  
RST Pulse Width  
(Note 14)  
-
-
2
-
-
-
-
-
ms  
ns  
ns  
t
150  
-
rst  
RST to STBY Falling  
t
-
-
-
-
-
100  
drrs  
RST Rising to STBY Rising  
CH1/2 Edge to TRK1, TRK2 Rising  
CH1/2 Edge to TRK1, TRK2 Falling  
HOLD to SSH Falling  
t
11,528,160  
t
clk  
cal  
(Note 15)  
(Note 15)  
(Note 16)  
(Note 16)  
(Note 16)  
(Note 17)  
(Note 16)  
(Note 17)  
t
t
t
t
80  
ns  
drsh1  
dfsh4  
dfsh2  
dfsh1  
-
68t +260 ns  
clk  
60  
ns  
HOLD to TRK1, TRK2, Falling  
HOLD to TRK1, TRK2, SSH Rising  
HOLD Pulse Width  
66t  
-
-
68t +260 ns  
clk  
clk  
t
120  
-
63t  
64t  
ns  
ns  
ns  
ns  
drsh  
t
t
1t +20  
clk  
-
-
-
hold  
dhlri  
clk  
clk  
HOLD to CH1/2 Edge  
15  
95  
HOLD Falling to CLKIN Falling  
t
1tclk+10  
hcf  
Notes: 13. External loading capacitors are required to allow the crystal to oscillate. Maximum crystal frequency  
is 8.0 MHz in FRN mode (100 kHz sample rate).  
14. With a 8 MHz crystal, two 10 pF loading capacitors and a 10 Mparallel resistor (see Figure 8).  
15. These times are for FRN mode.  
16. SSH only works correctly if HOLD falling edge is within +15 to +30 ns of CH1/2 edge or if CH1/2 edge  
occurs after HOLD rises to 64 t after HOLD has fallen. These times are for PDT and RBT modes.  
clk  
17. When HOLD goes low, the analog sample is captured immediately. To start conversion, HOLD must  
be latched by a falling edge of CLKIN. Conversion will begin on the next rising edge of CLKIN after  
HOLD is latched. If HOLD is operated synchronous to CLKIN, the HOLD pulse width may be as  
narrow as 150 ns for all CLKIN frequencies if CLKIN falls 95 ns after HOLD falls. This  
ensures that the HOLD pulse will meet the minimum specification for t  
.
hcf  
4
DS45F2