CS2000-CP
CONTROL PORT SWITCHING CHARACTERISTICS- I²C FORMAT
Inputs: Logic 0 = GND; Logic 1 = VD; C
L
= 20 pF.
Parameter
SCL Clock Frequency
Bus Free-Time Between Transmissions
Start Condition Hold Time (prior to first clock pulse)
Clock Low Time
Clock High Time
Setup Time for Repeated Start Condition
SDA Hold Time from SCL Falling
SDA Setup Time to SCL Rising
Rise Time of SCL and SDA
Fall Time SCL and SDA
Setup Time for Stop Condition
Acknowledge Delay from SCL Falling
Delay from Supply Voltage Stable to Control Port Ready
Symbol
f
scl
t
buf
t
hdst
t
low
t
high
t
sust
t
hdd
t
sud
t
r
t
f
t
susp
t
ack
t
dpor
Min
-
4.7
4.0
4.7
4.0
4.7
0
250
-
-
4.7
300
100
Max
100
-
-
-
-
-
-
-
1
300
-
1000
-
Unit
kHz
µs
µs
µs
µs
µs
µs
ns
µs
ns
µs
ns
µs
Notes:
7. Data must be held for sufficient time to bridge the transition time, t
f
, of SCL.
VD
t
dpor
Repeated
Start
Stop
SDA
t buf
SCL
t hdst
t high
t
hdst
tf
t susp
Stop
Start
t
low
t
hdd
t sud
t sust
tr
Figure 2. Control Port Timing - I²C Format
8
DS761A2
CIRRUS [ CIRRUS LOGIC ]
