CobraNet Hardware User’s Manual
Pinout and Signal Descriptions
4.2.7 System Signals
Use these CS1810xx/CS4961xx signals stricktly in the manner described in CM-2
Schematics (Section 9.2 on page 44). Each signal is briefly described below.
CS1810xx/CS4961xx
Signal
Description
Pin #
VCXO_CTRL
MCLK_SEL
A Delta-sigma DAC Output for Controlling the On-board VCXO
Control Signal for Selecting MCLK Sources
I2C Debugger Interface
1
2
DBDA, DBCK
3, 4
Used for testing during manufacturing. Keep grounded for normal
operation.
TEST
9
29-32, 34, 35, 37, 39-43,
45, 46, 48, 49
DATA[15:0]
Data Bus for Flash & Ethernet Controller(s)
Address Bus for Flash & Ethernet Controller(s)
55, 56, 58, 59, 61, 62, 64,
67, 68, 70-72, 74, 75, 77,
82, 84, 85, 87, 88
ADDR[19:0]
WE
CS1
Write Enable for Flash and Ethernet Controller(s)
Chip Select for Flash Memory Device
Chip Select for Ethernet Controller(s)
Output Enable
38
90
CS2
65
OE
89
IOWAIT
GPIO[2:0]
XTI
Wait State Signal from Ethernet Controller(s)
General-purpose I/O Signals
Reference Clock Input / Crystal Oscillator Input
Crystal Oscillator Output
96
99, 100, 108
125
XTO
124
XTAL_OUT
FILT2, FILT1
DAO_MCLK
HS[3:0]
A Buffered Version of XTI
123
PLL Loop Filter
127, 128
8
MCLK Input
CS1810xx/CS4961xx Boot Mode Selection
11, 16, 17, 19
DS651UM23
Version 2.3
©Copyright 2005 Cirrus Logic, Inc.
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