CDB42406
1.7.2b
Setup 4
Using the on-board crystal oscillator, AUDIO MCLK, a DSP connected to DSP I/O HDR
masters the subclocks for the ADC/DAC. For implementation of this setup option, set DIP
switch S4 (SW[3:0]) to ‘0100’b.
CS8416
RMC K
M CLK
DAC_LRCK/
DAC_SC LK
DAC_SD IN x
A DC_LRCK/
A DC_SCLK
ADC_SDOUT
CS42406
AUDIO
MCLK
OM CK
OLRCK/
OSCLK
SDOUT
CS8406
OM CK
ILR CK/
IS CLK
S DIN
DSP I/O
H DR
DS P_M CLK
DSP_DA C_LR CK/
DSP_DAC _S CLK
DSP _S DINx
DSP_A DC_LR CK/
DSP_ADC _S CLK
D SP_SDOUT
Figure 5. Digital Loopback - Setup 4
1.7.2c
Setup 5
Using the master clock from an external DSP connected to the DSP I/O HDR,
DSP_MCLK, the CS42406 ADC masters the subclocks and data for the DAC. For imple-
mentation of this setup option, set DIP switch S4 (SW[3:0]) to ‘0101’b.
C S8416
R M CK
M C LK
D AC _LR C K/
D AC _SC LK
D AC _SD INx
AD C _L RC K/
AD C _SC LK
AD C_ SDO U T
CS42406
AU DIO
M C LK
O MC K
OL RC K/
OSC LK
SDO U T
CS8406
O M CK
IL RC K/
ISC LK
SD IN
DSP I/O
HD R
D SP_ MC LK
D SP_ DAC _L RC K/
D SP_ DAC _SC LK
D SP_SD IN x
D SP_ AD C _L RC K/
D SP_ AD C _SC LK
D SP_SDO U T
Figure 6. Digital Loopback - Setup 5
9
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