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CS5302GDW28 参数 Datasheet PDF下载

CS5302GDW28图片预览
型号: CS5302GDW28
PDF下载: 下载PDF文件 查看货源
内容描述: [Switching Controller, PDSO28, SO-28]
分类和应用: 开关光电二极管
文件页数/大小: 20 页 / 139 K
品牌: CHERRY [ CHERRY SEMICONDUCTOR CORPORATION ]
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CS5302  
drive traces should be kept as short and wide as practical and  
For ideal current sense compensation the ratio of L and  
R is fixed, so the values of L and R will be a  
L
should have a return path directly below the gate trace.  
Output filter components should be placed on wide planes  
connected directly to the load to minimize resistive drops  
during heavy loads and inductive drops and ringing during  
transients. If required, the planes for the output voltage and  
return can be interleaved to minimize inductance between  
the filter and load.  
L
compromise typically with the maximum value R  
L
limited by conduction losses or inductor temperature  
rise and the minimum value of L limited by ripple  
current.  
3. For resistive current sensing choose L and R to  
S
provide a steady state ramp greater than 25 mV.  
Voltage feedback should be taken from a point of the  
output or the output filter that doesn’t favor any one phase.  
If the feedback connection is closer to one inductor than the  
others the ripple associated with that phase may appear  
larger than the ripple associated with the other phases and  
poor current sharing can result.  
The current sense signal is typically tens of milli–volts.  
Noise pick–up should be avoided wherever possible.  
Current feedback traces should be routed away from noisy  
areas such as switch nodes and gate drive signals. The paths  
should be matched as well as possible. It is especially  
important that all current sense signals be picked off at  
similar points for accurate current sharing. If the current  
signal is taken from a place other than directly at the inductor  
any additional resistance between the pick–off point and the  
inductor appears as part of the inherent inductor resistance  
and should be considered in design calculations. Capacitors  
for the current feedback networks should be placed as close  
to the current sense pins as practical.  
LńR + (V * V  
IN  
)   T  
OUT  
ń25 mV  
ON  
S
Again the ratio of L and R is fixed and the values of  
L
L and R will be a compromise.  
S
4. Calculate the high frequency output impedance  
(ConverterZ) of the converter during transients. This  
is the impedance of the Output filter ESR in parallel  
with the power stage output impedance (PwrstgZ)  
and will indicate how far from the original level  
(VR) the output voltage will typically recover to  
within one switching cycle. For a good transient  
response VR should be less than the peak output  
voltage overshoot or undershoot.  
DVR + ConverterZ   ESR  
PwrstgZ   ESR  
ConverterZ +  
PwrstgZ ) ESR  
where:  
PwrstgZ + R   CSA Gainń3.0  
S
Multiply the converterZ by the output current step  
size to calculate where the output voltage should  
recover to within the first switching cycle after a  
transient. If the ConverterZ is higher than the value  
required to recover to where the adaptive positioning  
is set the remainder of the recovery will be controlled  
by the error amp compensation and will typically  
recover in 10–20 µs.  
DESIGN PROCEDURE  
Current Sensing, Power Stage and  
Output Filter Components  
1. Choose the output filter components to meet peak  
transient requirements. The formula below can be  
used to provide an approximate starting point for  
capacitor choice, but will be inadequate to calculate  
actual values.  
DVR + DI  
OUT  
  ConverterZ  
DV  
+ (DIńDT)   ESL ) DI   ESR  
PEAK  
Make sure that VR is less than the expected peak  
Ideally the output filter should be simulated with  
models including ESR, ESL, circuit board parasitics  
and delays due to switching frequency and converter  
response. Typically both bulk capacitance  
(electrolytic, Oscon, etc.,) and low impedance  
capacitance (ceramic chip) will be required. The bulk  
capacitance provides “hold up” during the converter  
response. The low impedance capacitance reduces  
steady state ripple and bypasses the bulk capacitance  
during slewing of output current.  
transient for a good transient response.  
5. Adjust L and R or R as required to meet the best  
L
S
combination of transient response, steady state output  
voltage ripple and pulse width jitter.  
Current Limit  
When the sum of the Current Sense amplifiers (V  
)
ITOTAL  
exceeds the voltage on the I  
pin the part will enter hiccup  
LIM  
mode. For inductive sensing the I  
pin voltage should be  
LIM  
set based on the inductor resistance (or current sense  
resistor) at max temperature and max current. To set the level  
2. For inductive current sensing (only) choose the  
current sense network RC to provide a 25 mV  
minimum ramp during steady state operation.  
of the I  
pin:  
LIM  
6. V  
+ R   I  
  CS to I Gain  
LIM  
I(LIM)  
OUT(LIM)  
where:  
V
ńV  
OUT IN  
R is R or R  
R + (V * V  
IN  
)   
OUT  
L
S;  
F   C   25 mV  
I
is the current limit threshold.  
OUT(LIM)  
For the overcurrent to work properly the inductor  
time constant (L/R) should bethe Current sense RC.  
Then choose the inductor value and inherent  
resistance to satisfy L/R = R × C.  
L
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