CM6500UN (1MHz PFC)
http://www.championmicro.com.tw
EPA/90+ ZVS-Like PFC CONTROLLER
Design for High Efficient Power Supply at both Full Load and Light Load
PFC Voltage Loop
The Current Loop Gain (S)
There are two major concerns when compensating the
voltage loop error amplifier, VEAO; stability and transient
response. Optimizing interaction between transient response
and stability requires that the error amplifier’s open-loop
crossover frequency should be 1/2 that of the line frequency,
or 23Hz for a 47Hz line (lowest anticipated international power
frequency).
ΔV
ΔDOFF
ΔIEAO
ΔIEAO
ISENSE
=
≈
*
*
ΔDOFF
OUTDC *RS
ΔISENSE
V
* GMI * ZCI
S *L * 2.5V
deviate from its 2.5V (nominal) value. If this happens, the
transconductance of the voltage error amplifier, GMv will
increase significantly, as shown in the Typical Performance
Characteristics. This raises the gain-bandwidth product of the
voltage loop, resulting in a much more rapid voltage loop
response to such perturbations than would occur with a
conventional linear gain characteristics.
ZCI: Compensation Net Work for the Current Loop
GMI: Transconductance of IEAO
VOUTDC: PFC Boost Output Voltage; typical designed value is
380V and we use the worst condition to calculate the ZCI
RSENSE: The Sensing Resistor of the Boost Converter
2.5V: The Amplitude of the PFC Leading Edge Modulation
Ramp(typical)
The Voltage Loop Gain (S)
L: The Boost Inductor
ΔVOUT
ΔVFB
ΔVEAO
ΔVFB
=
≈
*
*
ΔVEAO ΔVOUT
The gain vs. input voltage of the CM6500UN’s voltage error
amplifier, VEAO has a specially shaped non-linearity such that
under steady-state operating conditions the transconductance
of the error amplifier, GMv is at a local minimum. Rapid
perturbation in line or load conditions will cause the input to the
voltage error amplifier (VFB) to
P
IN * 2.5V
* GM * ZCV
V
V
OUTDC2 * ΔVEAO * S * CDC
Z
CV: Compensation Net Work for the Voltage Loop
GMv: Transconductance of VEAO
PIN: Average PFC Input Power
VOUTDC: PFC Boost Output Voltage; typical designed value is
380V.
ISENSE Filter, the RC filter between RSENSE and ISENSE
:
There are 2 purposes to add a filter at ISENSE pin:
C
DC: PFC Boost Output Capacitor
1.) Protection: During start up or inrush current conditions, it
will have a large voltage cross Rs which is the sensing
resistor of the PFC boost converter. It requires the ISENSE
Filter to attenuate the energy.
PFC Current Loop
The current transcondutance amplifier, GMi, IEAO
compensation is similar to that of the voltage error amplifier,
VEAO with exception of the choice of crossover frequency.
The crossover frequency of the
current amplifier should be at least 10 times that of
the voltage amplifier, to prevent interaction with the voltage
loop. It should also be limited to less than 1/6th that of the
switching frequency, e.g. 8.33kHz for a 50kHz switching
frequency.
2.) To reduce L, the Boost Inductor: The ISENSE Filter To
reduce L, the Boost Inductor: The ISENSE Filter also can
reduce the Boost Inductor value since the ISENSE Filter
behaves like an integrator before going ISENSE which is the
input of the current error amplifier, IEAO.
The ISENSE Filter is a RC filter. The resistor value of the ISENSE
Filter is 50 ohm because IOFFSET x the resistor can generate an
offset voltage of IEAO. By selecting RFILTER equal to 50ohm will
keep the offset of the IEAO less than 10mV. Usually, we
design the pole of ISENSE Filter at fpfc/6~fpfc=8.33Khz, one
sixth of the PFC switching frequency. Therefore, the boost
inductor can be reduced 6 times without disturbing the stability.
Therefore, the capacitor of the ISENSE Filter, CFILTER, will be
around 382.1nF.
2014/11/11 Rev. 1.0
Champion Microelectronic Corporation
13