24LLC16
16K-Bit-Serial EEPROM
Table 5-4. D.C. Electrical Characteristics (Continued)
°
°
°
°
(TA = – 25 C to + 70 C (Commercial), – 40 C to + 85 C (Industrial), VCC = 2.0 V to 5.5 V)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
CIN
–
–
10
pF
°
Input capacitance
25 C, 1MHz,
VCC = 5 V, VIN = 0 V,
A0, A1, A2, SCL and WP pin
CI/O
–
–
10
°
Input/Output capacitance
25 C, 1MHz,
VCC = 5 V, VI/O = 0 V,
SDA pin
Table 5-5. A.C. Electrical Characteristics
°
°
°
°
(TA = – 25 C to + 70 C (Commercial), – 40 C to + 85 C (Industrial), VCC = 2.0 V to 5.5 V)
Parameter
Symbol Conditions
VCC = 2.0 to 5.5 V
(Standard Mode)
VCC = 4.5 to 5.5 V
(Fast Mode)
Unit
Min
Max
Min
Max
100 (1)
400 (1)
Fclk
tHIGH
tLOW
External clock frequency
Clock High time
–
0
0
kHz
ms
ms
ms
ms
ms
ms
ms
ms
ms
ms
–
4
4.7
–
–
–
0.6
1.3
–
–
–
Clock Low time
–
tR
Rising time
SDA, SCL
1
0.3
0.3
–
tF
Falling time
SDA, SCL
–
0.3
–
–
tHD:STA
tSU:STA
tHD:DAT
tSU:DAT
tSU:STO
tBUF
Start condition hold time
Start condition setup time
Data input hold time
Data input setup time
Stop condition setup time
Bus free time
–
–
–
–
–
4
0.6
0.6
0
4.7
0
–
–
–
–
0.25
4
–
0.1
0.6
1.3
–
–
–
Before new
4.7
–
–
transmission
tAA
Data output valid from
clock low (2)
–
0.3
3.5
–
0.9
ms
tSP
Noise spike width
Write cycle time
–
–
–
–
100
5
–
–
50
5
ns
tWR
ms
NOTES:
1. Upon customers request, up to 400 kHz (Max.) in standard mode and 1 MHz in fast mode are available.
2. When acting as a transmitter, the 24LLC16 must provide an internal minimum delay time to bridge the undefined
period (minimum 300 ns) of the falling edge of SCL. This is required to avoid unintended generation of a start or stop
condition.
* All specs and applications shown above subject to change without prior notice.
1F-5 NO.66 SEC.2 NAN-KAN RD ., LUCHU , TAOYUAN, TAIWAN
Tel:886-3-3214525
Email: server@ceramate.com.tw
Http: www.ceramate.com.tw
Rev 1.0 Aug.5, 2002
Page 15 of 22
Fax:886-3-3521052
CERAMATE [ CERAMATE TECHNICAL ]
