CAT25080, CAT25160
READ OPERATIONS
Read Status Register
Read from Memory Array
To read the status register, the host simply sends a
RDSR command. After receiving the last bit of the
command, the CAT25080/160 will shift out the contents
of the status register on the SO pin (Figure 9). The
status register may be read at any time, including during
an internal write cycle.
To read from memory, the host sends a READ
instruction followed by a 16-bit address (see Table 5 for
the number of significant address bits).
After receiving the last address bit, the CAT25080/160
will respond by shifting out data on the SO pin (as
shown in Figure 8). Sequentially stored data can be
read out by simply continuing to run the clock. The
internal address pointer is automatically incremented to
the next higher address as data is shifted out. After
reaching the highest memory address, the address
counter “rolls over” to the lowest memory address, and
the read cycle can be continued indefinitely. The read
¯¯
operation is terminated by taking CS high.
Figure 8. READ Timing
CS
0
1
2
3
4
5
6
7
8
9
10
20 21 22 23 24 25 26 27 28 29 30
SCK
OPCODE
BYTE ADDRESS*
A
A
0
SI
0
0
0
0
0
0
1
1
N
DATA OUT
HIGH IMPEDANCE
SO
7
6
5
4
3
2
1
0
MSB
* Please check the Byte Address Table (Table 5).
Note: Dashed Line = mode (1, 1) - - - - - -
Figure 9. RDSR Timing
CS
0
1
2
3
4
5
1
6
0
7
1
8
9
10
11
12
13
14
SCK
OPCODE
0
0
0
0
0
SI
DATA OUT
HIGH IMPEDANCE
SO
5
7
6
4
3
2
1
0
MSB
Note: Dashed Line = mode (1, 1) - - - - - -
© 2006 Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
9
Doc. No. 1122 Rev. A
CATALYST [ CATALYST SEMICONDUCTOR ]
