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TMC22091R0C 参数 Datasheet PDF下载

TMC22091R0C图片预览
型号: TMC22091R0C
PDF下载: 下载PDF文件 查看货源
内容描述: 数字视频编码器/分层引擎 [Digital Video Encoders/Layering Engine]
分类和应用: 商用集成电路编码器
文件页数/大小: 60 页 / 394 K
品牌: CADEKA [ CADEKA MICROCIRCUITS LLC. ]
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TMC22091/TMC22191  
PRODUCT SPECIFICATION  
Control Register Definitions (continued)  
Subcarrier Registers (20-27)  
Reg  
Bit  
Name  
Function  
20  
7-0  
FREQL  
Subcarrier frequency 4th byte (LSBs). This 8-bit register holds the LSB (bits  
7-0) of the 32-bit subcarrier frequency value (non-genlock modes). The next  
eight most significant bits are held in Register 21.  
21  
22  
7-0  
7-0  
FREQ3  
FREQ2  
Subcarrier frequency 3rd byte. This 8-bit register holds bits 15:8 of the  
subcarrier frequency value (non-genlock modes). The next eight most  
significant bits are held in Register 22.  
Subcarrier frequency 2nd byte. This 8-bit register holds bits 23-16 of the  
subcarrier frequency value (non-genlock modes). The eight MSBs are held in  
Register 23.  
23  
24  
25  
26  
27  
7-0  
7-0  
7-0  
7-0  
7-0  
FREQM  
Subcarrier frequency 1st byte (MSBs). This 8-bit register holds the MSBs (bits  
31-24) of the 32-bit subcarrier frequency value (non-genlock modes).  
SYSPHL  
SYSPHM  
BURPHL  
BURPHM  
Video phase offset LSBs. This 8-bit register holds the 8 LSBs of color subcarrier  
phase offset during active video.  
Video phase offset MSBs. This 8-bit register holds the 8 MSBs of color  
subcarrier phase offset during active video.  
Burst phase offset LSBs. This 8-bit register holds the 8 LSBs of burst phase  
offset for color adjustment.  
Burst phase offset MSBs. This 8-bit register holds the 8 MSBs of burst phase  
for color adjustment.  
Test I/O Register (40)  
Reg  
Bit  
Name  
Function  
40  
7-0  
TESTDAT  
Test data input/output. This 8-bit register holds MSBs or LSBs, as determined  
by the Test Control Register. This control address does not auto-increment  
during read or write operations. To exit the test mode, reset the Control  
Register pointer by setting A  
and R/W LOW and then bring CS LOW.  
1-0  
Mask Register (50)  
Reg  
Bit  
Name  
Function  
50  
7-0  
MASK  
Mask register. This 8-bit register holds an 8-bit word that is logically ANDed with  
the incoming data presented to the three CLUTs in color-index mode. This  
register is a write-only register.  
Y-Component Register (60)  
Reg  
Bit  
Name  
Function  
60  
7-0  
Y
Y-component register. This register holds the contents of the luminance value  
before the Sync and Blank Insert circuitry of the encoder. Loading the Control  
Register pointer with 60 brings 8-bit Y values out on the D  
port.  
h
7-0  
22  
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