PRODUCT SPECIFICATION
TMC2193
SY
BR
BU
CBP
VA
FP
65-6294-10
Figure 9. Horizontal Timing
ming, any pixel rate between 10 and 15 Mpps can be accom-
modated, and any desired standard or non-standard vertical
video timing may be produced.
Table 8. Horizontal Timing Specifications
NTSC-M
PAL-I
PAL-M
Parameter
(µs)
(µs)
(µs)
Like horizontal timing parameters, vertical timing parame-
ters are calculated as follows:
FP
SY
BR
BU
CBP
VA
H
1.5
4.7
1.65
4.7
1.9
4.95
t = N x ( PCK period )
0.6
0.9
0.9
= N x ( 2 x PXCK period )
2.5
2.25
2.55
51.95
64.0
2.25
where N is the value loaded into the appropriate timing reg-
ister, and PCK is the pixel clock period.
1.6
1.8
52.6556
63.5556
51.692
63.492
The vertical interval comprises several different line types
based upon H, the Horizontal line time.
H = (2 x SL) + (2 x SH) [Vertical sync pulses]
= (2 x EL) + (2 x EH) [Equalization pulses]
Vertical interval timing is also fully programmable, and is
established by loading the timing registers with the dura-
tion’s of each vertical timing element, the duration expressed
in PCK clock cycles. In this way as with horizontal program-
H
H/2
EL
EH
SL
SH
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Figure 10. Horizontal Timing – Vertical Blanking
The VB and VC control registers are added to produce the
half-lines needed in the vertical interval at the beginning and
end of some fields. These must properly mate with compo-
nents of the normal lines.
REV. 1.0 3/26/03
15
CADEKA [ CADEKA MICROCIRCUITS LLC. ]
