TMC2193
PRODUCT SPECIFICATION
Horizontal interval timing is fully programmable and is
established by loading the timing registers with the duration
of each horizontal element. The duration is expressed in
PCK clock cycles. In this way, any pixel clock rate between
10 MHz and 15 MHz can be accommodated, and any desired
standard or non-standard horizontal video timing may be
produced.
Horizontal Programming
Control registers for this section
Address
0x06
0x19
0x19
0x19
0x20
0x21
0x22
0x23
0x24
0x25
0x26
0x27
0x28
0x29
0x2A
0x2B
0x2C
0x2D
0x2D
0x2D
0x2D
Bit(s)
7-6
7
Name
FORMAT
SHORT
T512
HALFEN
SY
6
Horizontal timing parameters can be calculated as follows:
5
t = N x ( PCK period )
7-0
7-0
7-0
7-0
7-0
7-0
7-0
7-0
7-0
7-0
7-0
7-0
7-0
7-6
5-4
3-2
1-0
= N x ( 2 x PXCK period )
BR
where N is the value loaded into the appropriate timing
register, and PCK is the pixel clock period.
BU
CBP
XBP
VA
When programming horizontal timing, subtract 5 PCK
periods from the calculated values of CBP and add 5 PCK
periods to the calculated value for VA. The control register
HALFEN enables the 1st half line (UBV) on line 283 for
NTSC, PAL-M and line 23 for all other PAL standards when
it is LOW.
VC
VB
EL
EH
SL
SH
FP
XBP (MSB’s)
VA (MSB’s)
VB (MSB’s)
VC (MSB’s)
Table 7. Horizontal Line Equations
Line Type
EE
Line ID
00
Line Length Equals
EL + EH + EL + EH
SE
02
SL + SH + EL + EH
SS
03
SL + SH + SL + SH
ES
01
EL + EH + SL + SH
EB
10
EL + EH + EL + EH
UBB, -BB
UVV, -VV
UVE, -VE
UBV
0D, 05
0F, 07
0C, 04
0E
SY + BR + BU + CBP + VA + FP
SY + BR + BU + CBP + VA + FP
SY + BR + BU + CBP + VC + FP + EL + EH
SY + BR + BU + XBP + VB + FP
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REV. 1.0 3/26/03
CADEKA [ CADEKA MICROCIRCUITS LLC. ]
