TIMING SPECIFICATION DEFINITIONS
ACQUISITION TIME
This is the time it takes the SPT9110 to acquire the analog
signal at the internal hold capacitor when it makes a transition
from hold mode to track mode. (See figure 1.) The acquisition
time is measured from the 50% input clock transition point to
the point when the signal is within a specified error band at the
internal hold capacitor (ahead of the output amplifier). It does
not include the delay and settling time of the output amplifier.
Because the signal is internally acquired and settled at the
hold capacitor before the output voltage has settled, the
sampler can be put in hold mode before the output has settled.
TRACK-TO-HOLD SETTLING TIME
The time required for the output to settle to within 4 mV of its
final value.
APERTURE DELAY
The aperture delay time is the interval between the leading
edge transition of the clock input and the instant when the
input signal was equal to the held value. It is the difference
in time between the digital hold switch delay and the analog
signal propagation time.
Figure 1 - Timing Diagram
Aperture
Delay
Input
Acquisition
Time
Observed at
Hold Capacitor
Output
Observed at
Amplifier Output
Track-to-Hold
Settling
CLK
Hold
Track
Hold
NCLK
SPT9110
5
11/12/98
CADEKA [ CADEKA MICROCIRCUITS LLC. ]
