ELECTRICAL SPECIFICATIONS
T
A
= T
MIN
to T
MAX
, V
EE
= 0 to +5 V, V
DD
= +5 V, f
S
= 117 kHz, f
IN
= 10 kHz, unless otherwise specified.
PARAMETER
TEST
CONDITIONS
TEST
LEVEL
MIN
SPT774C
TYP
MAX
MIN
SPT774B
TYP
MAX
UNITS
DC ELECTRICAL CHARACTERISTICS
Power Supplies Operating
Voltage Range
V
DD
V
EE2
Operating Current
I
DD
I
EE
2
Power Dissipation
Internal Reference
Voltage
Output Current
3
DIGITAL CHARACTERISTICS
Logic Inputs
(CE, CS , R/C , Ao, 12/8 )
Logic 0
Logic1
Current
Capacitance
Logic Outputs
(DB11-DB0, STS)
Logic 0
Logic 1
Leakage
Capacitance
AC Accuracy
Spurious Free Dyn. Range
Total Harmonic Distortion
Signal-to-Noise Ratio
Signal-to-Noise & Distortion
(SINAD)
Intermodulation Distortion
f
S
=117 kHz, f
IN
=10 kHz
V
V
V
V
73
69
68
78
-77
72
71
76
-72
71
70
78
-77
72
71
-75
dB
dB
dB
dB
VI
VI
VI
V
-0.5
2.0
-5.0
0. 1
5
+0.8
5.5
5.0
-0.5
2.0
-5.0
0. 1
5
+0.8
5.5
5.0
Volts
Volts
µA
pF
IV
IV
IV
IV
VI
VI
VI
+4.5
+5.5
V
DD
15
167
75
24
120
2.6
+4.5
+5.5
V
DD
15
167
75
24
120
2.6
Volts
Volts
mA
µA
mW
Volts
mA
V
EE
= +5 V
2.4
0.5
2.5
2.4
0.5
2.5
(I
Sink
= 1.6 mA)
(I
SOURCE
= 500
µA)
(High Z State,
DB11-DB0 Only)
VI
VI
VI
V
+0.4
+2.4
-5
0.1
5
+5
+2.4
-5
0.1
5
+0.4
+5
Volts
Volts
µA
pF
V
-75
-75
dB
f
IN
=20 kHz;
f
IN2
=23 kHz
Note 1: Fixed 50
Ω
resistor from REF OUT to REF IN and REF OUT to BIP OFF.
Note 2: V
EE
is optional and is only used to set the mode for the internal sample/hold. When not using V
EE
, the pin should be treated
as a no connect. If V
EE
is connected to 0 to -15 V, aperture delay (t
AP
) will increase from 20 ns (typ) to 4000 ns (typ).
Note 3: Available for external loads; external load should not change during conversion.
SPT774
3
8/1/00
CADEKA [ CADEKA MICROCIRCUITS LLC. ]
