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SPT5400 参数 Datasheet PDF下载

SPT5400图片预览
型号: SPT5400
PDF下载: 下载PDF文件 查看货源
内容描述: 13位,八通道电压输出,并行接口DAC [13-BIT, OCTAL VOLTAGE-OUTPUT DAC WITH PARALLEL INTERFACE]
分类和应用: 输出元件
文件页数/大小: 8 页 / 156 K
品牌: CADEKA [ CADEKA MICROCIRCUITS LLC. ]
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ABSOLUTE MAXIMUM RATINGS (Beyond which damage may occur)
1
25
°C
Supply Voltages
V
DD
to GND ............................................. –0.3 to +6 V
V
SS
to GND ............................................. –6 to +0.3 V
AGNDxx ..................... (GND – 0.3 V) to (V
DD
+ 0.3 V)
Input Voltages
Digital Input Voltage to GND .. –0.3 V to (V
DD
+ 0.3 V)
REFxx .................. (AGNDxx – 0.3 V) to (V
DD
+ 0.3 V)
Maximum Current into REFxx Pin .................
±10
mA
Output
V
OUT
xx ...................................................... V
DD
to V
SS
Temperature
Operating Temperature, Ambient .............. 0 to +70
°C
Junction Temperature .................................... +165
°C
Lead Temperature, (soldering 10 seconds) ... +300
°C
Storage Temperature .......................... –65 to +150
°C
Power Dissipation ....................................... 1000 mW
Note 1: Operation at any Absolute Maximum Rating is not implied. Operation beyond the ratings may cause damage to the
device. See Electrical Specifications for proper nominal applied conditions in typical applications.
ELECTRICAL SPECIFICATIONS
V
DD
= +5 V, V
SS
= –5 V, REFxx = 4.096 V, AGNDxx = GND = 0 V, R
L
= 10 kΩ, C
L
= 50 pF, T
A
= T
MIN
to T
MAX
, unless otherwise
specified. Typical values are at T
A
= +25
°C.
PARAMETERS
DC Performance
Resolution
Integral Linearity
Differential Linearity
Zero Code Error
1
Gain Error
2
Power Supply Rejection Ratio
3
∆Gain/∆V
DD
∆Gain/∆V
SS
Load Regulation
Reference Input
Ref Input Range
4,5
Ref Input Resistance
5
Analog Output
Maximum Output Voltage
Minimum Output Voltage
Output Slew Rate
Output Settling Time
6
Digital Feedthrough
Digital Crosstalk
Digital Inputs
(V
DD
= 5 V
±5%)
Input Voltage High
Input Voltage Low
Input Current (V
IN
= 0 V or V
DD
)
Input Capacitance
Power Supplies
Positive Supply Range (V
DD
)
Negative Supply Range (V
SS
)
Positive Supply Current
Negative Supply Current
Power Dissipation
7
1
Deviation
2
Deviation
TEST
CONDITIONS
TEST
LEVEL
MIN
13
SPT5400
TYP
MAX
UNITS
Bits
LSB
LSB
LSB
LSB
%/%
%/%
LSB
V
kΩ
V
V
V/µs
µs
nV-s
nV-s
V
V
µA
pF
V
V
mA
mA
mW
Guaranteed Monotonic
VI
VI
VI
VI
VI
VI
V
IV
VI
V
V
V
V
V
V
VI
VI
VI
IV
VI
VI
VI
VI
VI
2.4
AGND
5
±0.5
±10.0
±1.0
±4.0
±1.0
±20
±15
±0.0025
±0.0025
R
L
=
to 10 kΩ
±0.4
V
DD
To
±1/2
LSB of Full Scale
V
DD
– 0.5
V
SS
+ 0.5
2.4
7.0
5
50
0.8
10.0
10
4.75
–5.25
15
16
155
5.25
–4.75
25
25
250
of actual DAC output when all 0s are loaded to the DAC from the ideal output of –4.096 V.
of actual DAC output span from the ideal span of 8.191 V.
3
PSSR is tested by changing the respective supply voltage by
±5%.
4
For best performance, REF should be greater than AGND + 2 V and less than V
DD
– 0.6 V. The device operates
with reference inputs outside this range, but performance may degrade.
5
Reference input resistance is code dependent.
6
Typical settling time with 1000 pF capacitive load is 8
µs.
7
Does not include reference power.
SPT5400
2
5/15/00