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CDK8307BILP64 参数 Datasheet PDF下载

CDK8307BILP64图片预览
型号: CDK8307BILP64
PDF下载: 下载PDF文件 查看货源
内容描述: 12月13日位,四十零分之二十零/ 50/ 65 / 80MSPS ,八通道,超低功耗ADC LVDS [12/13-bit, 20/40/50/65/80MSPS, Eight Channel, Ultra Low Power ADC with LVDS]
分类和应用:
文件页数/大小: 31 页 / 1408 K
品牌: CADEKA [ CADEKA MICROCIRCUITS LLC. ]
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Data Sheet
Symbol
Parameter
Sleep Channel Mode Dissipation
Sleep Channel Mode Savings
Conditions
All channels. in sleep ch. mode (light sleep)
Power dissipation savings per channel off
Min
Typ
46
17
Max
Units
mW
mW
MSPS
Clock Inputs
Maximum Conversion Rate
Minimum Conversion Rate
20
15
MSPS
CDK8307
12/13-bit, 20/40/50/65/80MSPS, Eight Channel, Ultra Low Power ADC with LVDS
Electrical Characteristics - CDK8307B
(AVDD = 1.8V, DVDD = 1.8V, OVDD = 1.8V, 40MSPS clock, 50% clock duty cycle, -1dBFS 8MHz input signal, 14-bit output, unless otherwise noted)
Symbol
Performance
SNR
SINAD
SFDR
HD2
HD3
ENOB
Crosstalk
Parameter
Conditions
F
IN
= 8MHz
F
IN
= 30MHz
F
IN
= 8MHz
F
IN
= 30MHz
F
IN
= 8MHz
F
IN
= 30MHz
F
IN
= 8MHz
F
IN
= 30MHz
F
IN
= 8MHz
F
IN
= 30MHz
F
IN
= 8MHz
F
IN
= 30MHz
See note (1) on page 13
Min
70
69
75
85
75
Typ
72.2
71.5
71.5
70.7
82
77
95
95
82
77
11.6
11.5
95
90
Max
Units
dBFS
dBFS
dBFS
dBFS
dBc
dBc
dBc
dBc
dBc
dBc
bits
bits
dBc
mA
mA
mW
mW
mW
µW
mW
mW
mW
MSPS
Signal to Noise Ratio
Signal to Noise and Distortion Ratio
Spurious Free Dynamic Range
Second order Harmonic Distortion
Third order Harmonic Distortion
Effective number of Bits
Power Supply
Analog supply current
Digital supply current
Analog power Dissipation
Digital power Dissipation
Total power Dissipation
Power Down Dissipation
Sleep Mode Dissipation
Sleep Channel Mode Dissipation
Sleep Channel Mode Savings
Power down mode
Deep sleep mode
All channels. in sleep ch. mode (light sleep)
Power dissipation savings per channel off
40
20
Digital and output driver supply
67
162
120
280
10
41
71
26
Clock Inputs
Maximum Conversion Rate
Minimum Conversion Rate
MSPS
Electrical Characteristics - CDK8307C
(AVDD = 1.8V, DVDD = 1.8V, OVDD = 1.8V, 50MSPS clock, 50% clock duty cycle, -1dBFS 8MHz input signal, 14-bit output, unless otherwise noted)
Symbol
Performance
SNR
SINAD
Parameter
Conditions
F
IN
= 8MHz
F
IN
= 30MHz
F
IN
= 8MHz
F
IN
= 30MHz
Min
70
69
Typ
72.2
71.5
71.5
70.7
Max
Units
dBFS
dBFS
dBFS
dBFS
Rev 1A
Signal to Noise Ratio
Signal to Noise and Distortion Ratio
©2009 CADEKA Microcircuits LLC
www.cadeka.com
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