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CDK2307BITQ64 参数 Datasheet PDF下载

CDK2307BITQ64图片预览
型号: CDK2307BITQ64
PDF下载: 下载PDF文件 查看货源
内容描述: 双通道, 20/40/ 65 / 80MSPS , 12月13日位模拟数字转换器 [Dual, 20/40/65/80MSPS, 12/13-bit Analog-to-Digital Converters]
分类和应用: 转换器
文件页数/大小: 16 页 / 1120 K
品牌: CADEKA [ CADEKA MICROCIRCUITS LLC. ]
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Data Sheet  
+F4  
+F1  
+F  
+F2  
+F0  
+
N-13  
CLK_EXT  
Figure 1. Timing Diagram  
Recommended Usage  
Analog Input  
DC-Coupling  
Figure 3 shows a recommended configuration for DC-  
coupling. Note that the common mode input voltage must  
be controlled according to specified values. Preferably, the  
CM_EXT output should be used as a reference to set the  
common mode voltage.  
The analog input to the CDK2307 is done through a  
switched capacitor track-and-hold amplifier optimized for  
differential operation. Operation at mid supply common  
mode voltage is recommended even if performance will  
be good for the ranges specified. The CM_EXT pin pro-  
vides a voltage suitable for a common mode voltage refer-  
ence. The internal buffer for the CM_EXT voltage can be  
switched off, and driving capabilities can be changed by  
using the CM_EXTBC control input.  
The input amplifier could be inside a companion chip or  
it could be a dedicated amplifier. Several suitable single  
ended to differential driver amplifiers exist in the market.  
The system designer should make sure the specifications  
of the selected amplifier is adequate for the total system,  
and that driving capabilities comply with the CDK2307  
input specifications.  
Figure 2 shows a simplified drawing of the input network.  
The signal source must have sufficiently low output imped-  
ance to charge the sampling capacitors within one clock  
cycle. A small external resistor (e.g. 22Ω) in series with  
each input is recommended as it helps reducing transient  
currents and dampens ringing behavior. A small differential  
shunt capacitor at the chip side of the resistors may be  
used to provide dynamic charging currents and may im-  
prove performance. The resistors form a low pass filter  
with the capacitor, and values must therefore be deter-  
mined by requirements for the application.  
43Ω  
33pF  
43Ω  
Figure 3. DC-Coupled Input  
Detailed configuration and usage instructions must be  
found in the documentation of the selected driver.  
AC-Coupling  
A signal transformer or series capacitors can be used to  
make an AC-coupled input network. Figure 4 shows a  
recommended configuration using a transformer. Make  
sure that a transformer with sufficient linearity is selected,  
Figure 2. Input Configuration  
©2009 CADEKA Microcircuits LLC  
www.cadeka.com  
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