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BL35P02 DATASHEET
7. Instruction Set
7.1 Addressing Modes
The addressing modes define the manner in which an instruction is to obtain the data required for its
execution. There are 8 modes:
1) Inherent
2) Immediate
3) Direct
4) Extended
5) Indexed, no offset
6) Indexed, 8-bit offset
7) Indexed, 16-bit offset
8) Relative
7.1.1 Inherent Addressing Mode
In inherent addressing mode, all information required for the operation is already inherently known to
the CPU, and no external operand from memory or from the program is needed. The operands, if any,
are only the index register and accumulator, and are always 1-byte instructions.
7.1.2 Immediate Addressing Mode
In the immediate addressing mode, the operand is contained in the byte immediately following the
opcode. This mode is used to hold a value or constant which is known at the time the program is
written and which is not changed during program execution. These are 2-byte instructions, one for the
opcode and one for the immediate data byte.
7.1.3 Direct Addressing Mode
The direct addressing mode is similar to the extended addressing mode except the upper byte of the
operand address is assumed to be $00. Thus, only the lower byte of the operand address needs to be
included in the instruction. Direct addressing allows you to efficiently address the lowest 256 bytes in
memory. This area of memory is called the direct page and includes on-chip RAM and I/O registers.
Direct addressing is efficient in both memory and time. Direct addressing mode instructions are usually
two bytes, one for the opcode and one for the low-order byte of the operand address.
7.1.4 Extended Addressing Mode
In the extended addressing mode, the address of the operand is contained in the two bytes following
the opcode. Extended addressing references any location in the MCU memory space including I/O,
RAM, ROM and EPROM. Extended addressing mode instructions are three bytes, one for the opcode
and two for the address of the operand.
7.1.5 Indexed, No Offset Addressing Mode
In the indexed, no-offset addressing mode, the effective address of the instruction is contained in the
8-bit index register. Thus, this addressing mode can access the first 256 memory locations. These
instructions are only one byte.
7.1.6 Indexed, 8-bit Offset Addressing Mode
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