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BL35P02 DATASHEET
A reset sets this bit to one; it must then be cleared by software to enable the
timerinterrupttotheCPU.Thistimerinterruptmaskonlymaskstimerinterruptrequest
to the CPU, and does not affect counting of the 8-bit counter or the setting of TIF.
.3 PRER – PREscaler Reset
Writing a “1” to this write-only bit will reset the prescaler to zero, which
is necessary for any new counts set by writing to the Timer Data Register. This bit
always reads as zero, and is not affected by reset.
.2-.0 PR[2:0]
These three bits enable the program to select the division ratio of the prescaler.
On reset, these three bits are set to “100”, which corresponds to a division ratio
of 16.
PR2 PR1 PR0 Divide Ration
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
1
2
4
8
16
32
64
128
KBIM($0B): Keyboard Interrupt Mask Register
.7-.0 KBE7:0]
[
The Keyboard Interrupt Mask Register (KBIM) masks individual keyboard interrupt pins and
setting of the internal pull-up resistors on Port A.
KBEi – PAi Keyboard Interrupt Enable
0 (clear) – Keyboard interrupt for PAi pin is masked. Any transitions on PAi will not set any
flags.
1 (set) – Keyboard interrupt enabled for PAi. A 25KΩ internal pull-up resistor is connected.
High to low transition on PAi will cause a keyboard interrupt.
MCR($0C): Miscellaneous Control Register
.7 KBIE – Keyboard Interrupt Enable
0 (clear) - Keyboard interrupts master disabled.
1 (set ) – keyboard interrupts master enabled.
On reset, KBIE bit is clear to “0”. KBIE and KBEi control the master enable for the keyboard
interrupts.
.6 KBIC – KeyBoard Interrupt Clear
0 (clear) – Writing a “0” has no effect.
1 (set) – writing a “1” clears the keyboard interrupt latch.
On reset, KBIC bit is clear to “0”. This is a write-only bit and always read as “0”.
.5 reserved
.4 PBP – PB7:PB4 Pull-up
0 (clear) – No pull-up resistor is connected to the inputs of PB7-PB4.
1 (set) – The internal 25KΩpull-up resistors are connected to the inputs of PB7-PB4
.3 PBP3 – PB3 Pull-up
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