TYPICAL CHARACTERISTICS (Cont.)
At TA = +25°C, +VCC = +2.7V, IOVDD = +1.8V, VREF = External +2.5V, 12-bit mode, PD0 = 0, fSAMPLE = 125kHz, and fCLK = 16 • fSAMPLE = 2MHz, unless otherwise noted.
TEMP1 DIODE VOLTAGE vs +VCC
720
718
716
714
712
710
2.7
3.0
3.3
+VCC (V)
+VCC. The value of the reference voltage directly sets the
input range of the converter.
THEORY OF OPERATION
The TSC2046 is a classic successive approximation register
(SAR) analog-to-digital converter (ADC). The architecture is
based on capacitive redistribution, which inherently includes
a sample-and-hold function. The converter is fabricated on a
0.6µm CMOS process.
The analog input (X-, Y-, and Z-Position coordinates, auxiliary
input, battery voltage, and chip temperature) to the converter is
provided via a multiplexer. A unique configuration of low on-
resistance touch panel driver switches allows an unselected
ADC input channel to provide power and the accompanying pin
to provide ground for an external device, such as a touch
screen. By maintaining a differential input to the converter and
a differential reference architecture, it is possible to negate the
error from each touch panel driver switch’s on-resistance (if this
is a source of error for the particular measurement).
The basic operation of the TSC2046 is shown in Figure 1.
The device features an internal 2.5V reference and uses an
external clock. Operation is maintained from a single supply
of 2.7V to 5.25V. The internal reference can be overdriven
with an external, low-impedance source between 1V and
+2.7V to +5V
TSC2046
DCLK A2
1µF
+
Serial/Conversion Clock
Chip Select
B1 +VCC
C1 +VCC
D1 X+
to
0.1µF
10µF
(Optional)
CS A3
DIN A4
Serial Data In
Converter Status
Serial Data Out
Pen Interrupt
E1 Y+
BUSY A5
DOUT A6
PENIRQ B7
IOVDD C7
VREF D7
Touch
Screen
G2 X–
G3 Y–
To Battery
Voltage
G6 VBAT
E7 AUX
Auxiliary Input
G4
G5
GND
GND
Regulator
NOTE: BGA package and pin names shown.
FIGURE 1. Basic Operation of the TSC2046.
TSC2046
8
SBAS265C
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