BLOCK DIAGRAM
(+)
(–)
Analog
Front-End
Circuit
Decimation
and
High Pass Filter
Delta-Sigma
Modulator
LRCIN
BCKIN
DIN
V
INL
VREF
L
Serial Data
Interface
ADC
Reference
VCOM
VREF
R
(–)
(+)
Analog
Front-End
Circuit
Decimation
and
High Pass Filter
Delta-Sigma
Modulator
VINR
DOUT
MC(1 )/DEM0(2)
MD(1 )/DEM1(2)
Analog
Low-Pass
Filter
Multi-Level
Delta-Sigma
Modulator
Interpolation
Filter
8X Oversampling
VOUT
L
Mode
Control
Interface
DAC
ML(1 )
20BIT(2)
Analog
Low-Pass
Filter
Multi-Level
Delta-Sigma
Modulator
Interpolation
Filter
8X Oversampling
VOUT
R
PDDA(2)
Reset and
RST(1)/PDAD(2)
Power Down
Zero Detect(1)
Power Supply
Clock
AGND2 VCC
2
AGND1 VCC
1
DGND
VDD
SYSCLK
ZFLG(1)
NOTES: (1) MC, MD, ML, RST, and ZFLG are for PCM3002 only. (2) DEM0, DEM1, 20BIT, PDAD, and PDDA are for PCM3003 only.
1.0µF
+
30kΩ
VIN
R
1
(+)
(–)
Delta-Sigma
Modulator
VCOM
21
4
VREF
L
+
4.7µF
V
REFR
+
5
4.7µF
VREF
+
4.7µF
FIGURE 1. Analog Front-End (Single-Channel).
®
PCM3002/3003
12