ABSOLUTE MAXIMUM RATINGS
Storage Temperature ......................................................... –40°C to +125°C
Supply Voltages, V
S
...................................................................... –0.5 to 6V
Transmitter Input Voltage, V
I
............................................. –0.5 to V
S
+ 0.5V
Receiver Output Voltage, V
O
............................................. –0.5 to V
S
+ 0.5V
R/T
X
Inputs ......................................................................... –0.5 to V
S
+ 0.5V
Isolation Voltage dV/dt, V
ISO
............................................................ 500kV/µs
D
X
Short to Ground ...................................................................... Continuous
Junction Temperature, T
J
.................................................................... 175°C
Lead Temperature (soldering, 10s) ..................................................... 260°C
1.6mm below seating plane (DIP package) ......................................... 300°C
PACKAGE INFORMATION
(1)
MODEL
ISO150AP
ISO150AU
PACKAGE
24-Pin Single-Wide DIP
28-Lead SOIC
PACKAGE DRAWING
NUMBER
243-1
217-2
NOTE: (1) For detailed drawing and dimension table, please see end of
data sheet, or Appendix D of Burr-Brown IC Data Book.
PIN DESCRIPTIONS
NAME
FUNCTION
Data in or data out for transceiver 1A. R/T
1A
held
low makes D
1A
an input pin.
Receive/Transmit switch controlling transceiver 1A.
+5V supply pin for side A which powers transceivers
1A and 2A.
Ground pin for transceivers 1B and 2B.
Receive/Transmit switch controlling transceiver 1B.
Data in or data out for transceiver 1B. R/T
1B
held
low makes D
1B
an input pin.
Data in or data out for transceiver 2B. R/T
2B
held
low makes D
2B
an input pin.
Receive/Transmit switch controlling D
2B
.
+5V supply pin for side B which powers transceivers
1B and 2B.
Ground pin for transceivers 1A and 2A.
Receive/Transmit switch controlling transceiver 2A.
Data in or data out for transceiver 2A. R/T
2A
held
low makes D
2A
in input pin.
D
1A
PIN CONFIGURATION
TOP VIEW
DIP
R/T
1A
V
SA
D
1A
1
R/T
1A
2
V
SA
3
24 D
2A
23 R/T
2A
22 G
A
G
B
R/T
1B
D
1B
D
2B
R/T
2B
V
SB
G
A
R/T
2A
D
2A
G
B
10
R/T
1B
11
D
1B
12
15 V
SB
14 R/T
2B
13 D
2B
ELECTROSTATIC
DISCHARGE SENSITIVITY
SOIC
TOP VIEW
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with ap-
propriate precautions. Failure to observe proper handling and
installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
D
1A
1
R/T
1A
2
V
SA
3
28 D
2A
27 R/T
2A
26 G
A
G
B
12
R/T
1B
13
D
1B
14
17 V
SB
16 R/T
2B
15 D
2B
®
3
ISO150
BURR-BROWN [ BURR-BROWN CORPORATION ]
