ADS7863
www.ti.com
SBAS383–JUNE 2007
SPECIAL MODE IV (Not ADS7861-Compatible)
As with Special Mode II, these two pins do not need
to be issued every 16 CLOCK cycles. Data are
available on the SDOA pin.
Analogous to Special Mode II, the ADS7863 also
offers a special read mode for Mode IV in which both
data results of a conversion can be read, triggered
by a single RD pulse. In this case as well, bit S4 in
the SDI Register must be set to '1' while the
CONVST and RD pins can still be tied together .
This special read mode (shown in Figure 21) is not
available in Mode I or Mode III.
16
1
16
1
16
1
16
1
16
1
1
1
CLOCK
CONVST
SDI
C[1:0] is Ignored
C[1:0] is Ignored
C[1:0] is Ignored
C[1:0] is Ignored
P[1:0] = '01' ® Features ON
P[1:0] = '01' ® S4 = '1'
P[1:0] = '11' ® No Updates
P[1:0] = '11' ® S4 Still = '1'
P[1:0] = '11' ® No Updates
P[1:0] = '11' ® S4 Still = '1'
P[1:0] = '11' ® No Updates
P[1:0] = '11' ® S4 Still = '1'
M0
M1
Both channel 0s are converted first,
followed by conversion of both channel 1s.
RD
CS
CHX
CHX
0 A
0 B
1 A
1 B
0 A
Previous 12-Bit
Data CHAx
12-Bit
12-Bit
12-Bit
12-Bit
12-Bit
SDOA
Data CHA0
Data CHB0
Data CHA1
Data CHB1
Data CHA0
High-Z
Previous 12-Bit
Data CHBx
SDOB
BUSY
Previous Conversion
of Both CHxx
Conversion
No Conversion,
Read Access Only
Conversion
No Conversion,
Read Access Only
Conversion
of Both CHx0
of Both CHx1
of Both CHx0
0ms
0.5ms
1.0ms
1.5ms
2.0ms
2.5ms
3.0ms
Figure 21. Special Mode IV Timing Diagram (M0 = 1; M1 = 1; S4 = 1)
19
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