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ADS7832BN 参数 Datasheet PDF下载

ADS7832BN图片预览
型号: ADS7832BN
PDF下载: 下载PDF文件 查看货源
内容描述: Autocalibrating , 4通道, 12位模拟数字转换器 [Autocalibrating, 4-Channel, 12-Bit ANALOG-TO-DIGITAL CONVERTER]
分类和应用: 转换器模数转换器
文件页数/大小: 15 页 / 301 K
品牌: BB [ BURR-BROWN CORPORATION ]
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INTERNAL CLOCK OPERATION  
Figure 12b shows how to use the internal clock generating  
circuitry. The clock frequency depends only on the value of  
the resistor, as shown in “Internal Clock Frequency vs  
RCLOCK” in the Typical Performance Curves section.  
50  
Analog  
Input  
To ADS7832  
5nF  
REF– (Normally 0V)  
The clock generator can operate between 100kHz and 2MHz.  
With R = 100k, the clock frequency will nominally be  
800kHz. The internal clock oscillators may vary by up to  
20% from device to device, and will vary with temperature,  
as shown in the typical performance curves. Therefore, use  
of an external clock source is preferred in applications where  
control of the conversion timing is critical, or where multiple  
converters need to be synchronized.  
V
(a) Passive Low Pass Filter  
To ADS7832  
OPA627  
R
Analog  
Input  
C
V
REF– (Normally 0V)  
(b) Active Low Pass Filter  
74HC-Compatible  
Clock Source  
CLK  
To ADS7832  
Pin 23  
FIGURE 10. Input Signal Conditioning.  
(a) External Clock Operation  
See Figure 15 for typical  
R Values vs Frequency  
R
To ADS7832  
Pin 23  
+5V  
(b) Internal Clock Operation  
+5V  
1
2
3
4
5
6
7
8
9
SFR  
AIN0  
AIN1  
AIN2  
AIN3  
VA  
28  
10nF  
+
FIGURE 12. Internal Clock Operation.  
AGND 27  
CAL 26  
A1 25  
10µF  
5V  
REF  
APPLICATIONS  
BIPOLAR INPUT RANGES  
A0 24  
Figure 13 shows a circuit to accurately and simply convert  
a bipolar ±5V input signal into a unipolar 0 to 5V signal for  
conversion by the ADS7832, using a precision, low-cost  
complete difference amplifier, INA105.  
VREF+  
CLK 23  
BUSY 22  
HBE 21  
WR 20  
CS 19  
RD 18  
D0 17  
10µF  
+
+
10nF  
10nF  
VREF–  
DGND  
VD  
10µF  
Figure 14 shows a circuit to convert a bipolar ±10V input  
signal into a unipolar 0 to 5V signal for conversion by the  
ADS7832. The precision of this circuit will depend on the  
matching and tracking of the three resistors used.  
10 D7  
11 D6  
12 D5  
13 D4  
14 D3  
To trim this circuit for full 12-bit precision, R2 and R3 need  
to be adjustable over appropriate ranges. To trim, first have  
the ADS7832 converting continually and apply +9.9927V  
(+10V – 1.5LSB) at the input. Adjust R3 until the ADS7832  
output toggles between the codes FFE hex and FFF hex.  
This makes R3 extremely close to R1. Then, apply –9.9976V  
(–10V + 0.5LSB) at the input, and adjust R2 until the  
ADS7832 output toggles between 000 hex and 001 hex. At  
each trim point, the current through the third resistor will be  
almost zero, so that one trim iteration will be enough in most  
cases. More iterations may be required if the op amp se-  
lected has large offset voltage or bias currents, or if the +5V  
reference is not precise.  
D1 16  
D2 15  
10Ω  
FIGURE 11. Power Supply and Reference Decoupling.  
recommended in microprocessor applications to prevent  
beat-frequency problems.  
This circuit can also be used to adjust gain and offset errors  
due to the components preceding the ADS7832, to match the  
performance of the self-calibration provided by the con-  
verter.  
Note that the electrical specification tables are based on  
using an external 2MHz clock. Typically, the specified  
accuracy is maintained for clock frequencies between 0.5  
and 2.4MHz.  
®
14  
ADS7832  
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