Figure 16 shows a QSPI-equipped microcontroller interfac-
ing to three ADS7813s. There are many possible variations
to this interface scheme. As shown, the QSPI port produces
a common CONV signal which initiates a conversion on all
three converters. After the conversions are finished, each
result is transferred in turn. The QSPI port is completely
programmable to handle the timing and transfers without
processor intervention. If the CONV signal is generated in
this way, it should be possible to make both AC and DC
measurements with the ADS7813, as the CONV signal will
have low jitter. Note that if the CONV signal is generated via
software commands, it will have a good deal of jitter and
only low frequency (DC) measurements can be made.
SPI INTERFACING
The serial peripheral interface (SPI) is directly related to the
QSPI and both Figures 15 and 16 can be used as a guide for
connecting the ADS7813 to SPI-equipped microcontrollers.
For most microcontrollers, the SPI port is capable of 8-bit
transfers only. In the case of Figure 15, be aware that the
microcontroller may have to be capable of fetching the 8
most significant bits before they are overwritten by the 8
least significant bits.
DSP56002 INTERFACING
The DSP56002 serial interface has an SPI compatibility
mode with some enhancements. Figure 17 shows an inter-
face between the ADS7813 and the DSP56002. As with the
QSPI interface of Figure 15, the DSP56002 must be pro-
grammed to enable the serial interface when a LOW to
HIGH transition on SCI occurs.
The DSP56002 can also provide the CONV signal, as shown
in Figure 18. The receive and transmit sections of the
interface are decoupled (asynchronous mode) and the trans-
mit section is set to generate a word length frame sync every
other transmit frame (frame rate divider set to 2). The
prescale modulus should be set to produce a transmit frame
at twice the desired conversion rate.
QSPI
ADS7813
CONV EXT/INT
+5V
PCS0
PCS1
PCS2
PCS3
SCK
CS
DATACLK
DATA
MIS0
Convert Pulse
+5V
ADS7813
DSP56002
ADS7813
CONV
CS
EXT/INT
CONV
DATACLK
DATA
SC1
BUSY
SRD
SCO
DATA
+5V
ADS7813
DATACLK
CS
CONV
CS
EXT/INT
EXT/INT
DATACLK
DATA
SYN = 0 (Asychronous)
GCK = 1 (Gated clock)
SCD1 = 0 (SC1 is an input)
SHFD = 0 (Shift MSB first)
WL1 = 1 WL0 = 0 (Word length = 16 bits)
FIGURE 17. DSP56002 Interface to the ADS7813.
FIGURE 16. QSPI Interface to Three ADS7813s.
DSP56002
ADS7813
SC2
CONV
BUSY
SC0
SRD
DATACLK
DATA
CS
SYN = 0 (Asychronous)
GCK = 1 (Gated clock)
EXT/INT
SCD2 = 1 (SC2 is an output)
SHFD = 0 (Shift MSB first)
WL1 = 1 WL0 = 0 (Word length = 16 bits)
FIGURE 18. DSP56002 Interface to the ADS7813. Processor Initiates Conversions.
17
®
ADS7813
BB [ BURR-BROWN CORPORATION ]
