ADS1610
www.ti.com
SBAS344C–AUGUST 2005–REVISED OCTOBER 2006
OVERVIEW
ANALOG INPUTS (AINP, AINN)
The ADS1610 is a high-performance, delta-sigma
ADC. The modulator uses an inherently stable,
The ADS1610 supports a very wide range of input
signals. Having such a wide input range makes
out-of-range signals unlikely. However, should an
out-of-range signal occur, the digital output OTR will
go high.
pipelined,
delta-sigma
modulator
architecture
incorporating proprietary circuitry that allows for very
linear high-speed operation. The modulator samples
the input signal at 60MSPS (when fCLK = 60MHz). A
low-ripple linear phase digital filter decimates the
modulator output by 6 to provide data output word
rates of 10MSPS with a signal passband out to
4.9MHz.
To achieve the highest analog performance, it is
recommended that the inputs be limited to no greater
than 0.891VREF (-1dBFS). For VREF = 3V, the
corresponding recommended input range is 2.67V.
The analog inputs must be driven with a differential
signal to achieve optimum performance. The
recommended common-mode voltage of the input
AINP ) AINN
Conceptually, the modulator and digital filter
measure the differential input signal, VID = (AINP –
AINN), against the differential reference, Vref
=
V
+
(VREFP – VREFN), as shown in Figure 11. A 16-bit
parallel data bus, designed for direct connection to
DSPs, outputs the data. A separate power supply for
the I/O allows flexibility for interfacing to different
logic families. Out-of-range conditions are indicated
with a dedicated digital output pin. Analog power
dissipation is controlled using an external resistor.
This allows reduced dissipation when operating at
slower speeds. When not in use, power consumption
can be dramatically reduced using the PD pin.
CM
2
signal,
is 2.5V.
In addition to the differential and common-mode
input voltages, the absolute input voltage is also
important. This is the voltage on either input (AINP or
AINN) with respect to AGND. The range for this
voltage is:
*0.1 V t (AINN or AINP) t 4.2 V
(1)
If either input is taken below –0.1V, ESD protection
diodes on the inputs will turn on. Exceeding 4.2V on
either input will result in linearity performance
degradation. ESD protection diodes will also turn on
if the inputs are taken above AVDD (+5V).
VREFP VREFN
Σ
VREF
OTR
Parallel
DOUT[15:0]
Digital
Filter
Interface
VIN
AINP
AINN
Σ∆
Σ
Modulator
MODE[1:0]
Figure 24. Conceptual Block Diagram
circuits. Switches S2 represent the net effect of the
modulator circuitry in discharging the sampling
capacitors, the actual implementation is different.
The timing for switches S1 and S2 is shown in
Figure 26.
INPUT CIRCUITRY
The ADS1610 uses switched-capacitor circuitry to
measure the input voltage. Internal capacitors are
charged by the inputs and then discharged internally
with this cycle repeating at the frequency of CLK.
Figure 25 shows a conceptual diagram of these
12
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