ADS1274
ADS1278
www.ti.com
SBAS367–JUNE 2007
OPA1632(1)
+3.3V
ADS1274
TMS320VC5509
AINP1
AINN1
IOVDD
CLK
DVDD (I/O)
10mF(2)
IN1
IN2
IN3
IN4
2.2nF(3)
50W
CLKOUT (27MHz)
AINP2
AINN2
50W
DRDY/FSYNC
SCLK
2.2nF(3)
2.2nF(3)
2.2nF(3)
50W
McBSP
PORT
50W
CVDD
(CORE)
AINP3
AINN3
+1.6V
DOUT1
DOUT2
DOUT3
DOUT4
SYNC
200MHz
AINP4
AINN4
+5V
PWDN1
PWDN2
PWDN3
PWDN4
I/O
AVDD
DVDD
+
10mF(2)
+1.8V
10mF(2)
1kW
20kW
0.1mF
100W
See
Note (5) 100W
VREFP
VREFN
OPA350
1kW
+
+3.3V
REF1004
10mF
0.1mF(2)
CLKDIV
+
(27MHz clock input selected)
100mF
0.1mF(2)
VCOM
MODE1
MODE0
0.1mF(2)
JTAG
Device(4)
TEST0
TEST1
DIN
(High-Speed, Frame-Sync, TDM,
and Fixed-Position data selected.)
FORMAT2
FORMAT1
100W
Buffered
VCOM
Output
OPA350
AGND
DGND
+3.3V
FORMAT0
NOTES: (1) External Schottky clamp diodes or series resistors may be needed to prevent overvoltage on the inputs. See Analog Inputs section.
(2) Indicates ceramic capacitors.
(3) Indicates COG ceramic capacitors.
(4) Optional. For boundary scan test, the ADS1274 digital I/O should connect to a JTAG-compatible device
(5) The op amp and input RC components filter the REF1004 noise.
Figure 88. ADS1274 Basic Connection Drawing
1kW
249W
1kW
1kW
VIN
5.6nF(2)
+12V(1)
1.5nF(2)
+12V(1)
Buffered
VCOM
Output
Buffered
VCOM
Output
49.9W
49.9W
49.9W
49.9W
AINP
AINP
AINN
VOCM
VOCM
OPA1632
VIN
OPA1632
0.1mF
AINN
0.1mF
-12V(1)
VO DIFF = 0.25 ´ VIN
-12V(1)
VO COMM = VREF
5.6nF(2)
1.5nF(2)
1kW
249W
1kW
1kW
(1) Bypass with 10mF and 0.1mF capacitors.
NOTES:
(1) Bypass with 10mF and 0.1mF capacitors.
NOTES:
(2) 2.7nF for Low-Power mode; 15nF for Low-Speed mode.
(2) 10nF for Low-Power mode; 56nF for Low-Speed mode.
Figure 89. Basic Differential Input Signal Interface
Figure 90. Basic Single-Ended Input Signal
Interface
38
Copyright © 2007, Texas Instruments Incorporated
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