ADS1274
ADS1278
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SBAS367–JUNE 2007
BOUNDARY SCAN TEST[1:0] INPUTS
VCOM OUTPUT
The Boundary Scan test mode feature of the
ADS1274/78 allows continuity testing of the digital I/O
pins. In this mode, the normal functions of the digital
pins are disabled and routed to each other as pairs
through internal logic, as shown in Table 15. Note
that some of the digital input pins become outputs.
Therefore, if using boundary scan tests, the
The VCOM pin provides a voltage output equal to
AVDD/2. The intended use of this output is to set the
output common-mode level of the analog input
drivers. The drive capability of the output is limited;
therefore, the output should only be used to drive
high-impedance nodes (> 1MΩ). In some cases, an
external buffer may be necessary. A 0.1μF bypass
capacitor is recommended to reduce noise pickup.
ADS1274/78 digital I/O should connect to
a
JTAG-compatible device. The analog input, power
supply, and ground pins remain connected as normal.
The test mode is engaged by the setting the pins
TEST[1:0] = 11. For normal converter operation, set
TEST[1:0] = 00. Do not use '01' or '10'.
ADS1274/78
OPA350
VCOM » (AVDD/2)
0.1mF
Table 15. Test Mode Pin Map (TEST[1:0] = 11)
TEST MODE PIN MAP
Figure 87. VCOM Output
INPUT PINS
PWDN1
OUTPUT PINS
DOUT1
DOUT2
DOUT3
DOUT4
DOUT5
DOUT6
DOUT7
DOUT8
DIN
PWDN2
PWDN3
PWDN4
PWDN5
PWDN6
PWDN7
PWDN8
MODE0
MODE1
SYNC
FORMAT0
FORMAT1
FORMAT2
CLKDIV
FSYNC/DRDY
SCLK
36
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