欢迎访问ic37.com |
会员登录 免费注册
发布采购

ADS1274IPAPRG4 参数 Datasheet PDF下载

ADS1274IPAPRG4图片预览
型号: ADS1274IPAPRG4
PDF下载: 下载PDF文件 查看货源
内容描述: 四/八通道,同步采样, 24位模拟至数字转换器 [Quad/Octal, Simultaneous Sampling, 24-Bit Analog-to-Digital Converters]
分类和应用: 转换器
文件页数/大小: 49 页 / 1821 K
品牌: BB [ BURR-BROWN CORPORATION ]
 浏览型号ADS1274IPAPRG4的Datasheet PDF文件第21页浏览型号ADS1274IPAPRG4的Datasheet PDF文件第22页浏览型号ADS1274IPAPRG4的Datasheet PDF文件第23页浏览型号ADS1274IPAPRG4的Datasheet PDF文件第24页浏览型号ADS1274IPAPRG4的Datasheet PDF文件第26页浏览型号ADS1274IPAPRG4的Datasheet PDF文件第27页浏览型号ADS1274IPAPRG4的Datasheet PDF文件第28页浏览型号ADS1274IPAPRG4的Datasheet PDF文件第29页  
ADS1274  
ADS1278  
www.ti.com  
SBAS367JUNE 2007  
The ADS1274/78 uses switched-capacitor circuitry to  
measure the input voltage. Internal capacitors are  
charged by the inputs and then discharged. Figure 67  
shows a conceptual diagram of these circuits. Switch  
S2 represents the net effect of the modulator circuitry  
in discharging the sampling capacitor; the actual  
implementation is different. The timing for switches S1  
and S2 is shown in Figure 68. The sampling time  
AINP  
AINN  
Zeff = 14kW ´ (6.75MHz/fMOD  
)
(tSAMPLE  
) is the inverse of modulator sampling  
frequency (fMOD) and is a function of the mode, the  
CLKDIV input, and CLK frequency, as shown in  
Table 5.  
Figure 69. Effective Input Impedances  
VOLTAGE REFERENCE INPUTS  
(VREFP, VREFN)  
AVDD AGND  
The voltage reference for the ADS1274/78 ADC is  
the differential voltage between VREFP and VREFN:  
VREF = (VREFP – VREFN). The voltage reference is  
common to all channels. The reference inputs use a  
structure similar to that of the analog inputs with the  
equivalent circuitry on the reference inputs shown in  
Figure 70. As with the analog inputs, the load  
presented by the switched capacitor can be modeled  
with an effective impedance, as shown in Figure 71.  
However, the reference input impedance depends on  
the number of active (enabled) channels in addition to  
fMOD. As a result of the change of reference input  
impedance caused by enabling and disabling  
channels, the regulation and setting time of the  
external reference should be noted, so as not to  
affect the readings.  
S1  
AINP  
S2  
9pF  
AINN  
S1  
AGND AVDD  
ESD Protection  
Figure 67. Equivalent Analog Input Circuitry  
tSAMPLE = 1/fMOD  
VREFP  
VREFN  
ON  
S1  
OFF  
ON  
S2  
AGND  
AVDD  
AGND  
AVDD  
OFF  
Figure 68. S1 and S2 Switch Timing for Figure 67  
ESD  
Protection  
Table 5. Modulator Frequency (fMOD) Mode  
Selection  
MODE SELECTION  
High-Speed  
CLKDIV  
fMOD  
fCLK/4  
fCLK/4  
fCLK/8  
fCLK/4  
fCLK/40  
fCLK/8  
1
1
1
0
1
0
High-Resolution  
Figure 70. Equivalent Reference Input Circuitry  
Low-Power  
Low-Speed  
VREFP  
VREFN  
The average load presented by the switched  
capacitor input can be modeled with an effective  
differential impedance, as shown in Figure 69. Note  
5.2kW  
Zeff  
=
´ (6.75MHz/fMOD)  
N
that the effective impedance is a function of fMOD  
.
N = number of active channels.  
Figure 71. Effective Reference Impedance  
25  
Copyright © 2007, Texas Instruments Incorporated  
Submit Documentation Feedback  
Product Folder Link(s): ADS1274 ADS1278  
 
 
 
 
 
 
 复制成功!