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ADS1274IPAPRG4 参数 Datasheet PDF下载

ADS1274IPAPRG4图片预览
型号: ADS1274IPAPRG4
PDF下载: 下载PDF文件 查看货源
内容描述: 四/八通道,同步采样, 24位模拟至数字转换器 [Quad/Octal, Simultaneous Sampling, 24-Bit Analog-to-Digital Converters]
分类和应用: 转换器
文件页数/大小: 49 页 / 1821 K
品牌: BB [ BURR-BROWN CORPORATION ]
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ADS1274  
ADS1278  
www.ti.com  
SBAS367JUNE 2007  
FUNCTIONAL DESCRIPTION  
controlled. Furthermore, the digital filters are  
synchronized to start the convolution phase at the  
same modulator clock cycle. This design results in  
excellent phase match among the ADS1274/78  
channels.  
The ADS1274/78 is a delta-sigma ADC consisting of  
four/eight independent converters that digitize  
four/eight input signals in parallel.  
The converter is composed of two main functional  
blocks to perform the ADC conversions: the  
modulator and the digital filter. The modulator  
samples the input signal together with sampling the  
reference voltage to produce a 1's density output  
stream. The density of the output stream is  
proportional to the analog input level relative to the  
reference voltage. The pulse stream is filtered by the  
internal digital filter where the output conversion  
result is produced.  
Figure 35 shows the inter-device channel sample  
matching for the ADS1274 and ADS1278.  
The phase match of one 4-channel ADS1274 to that  
of another ADS1274 (eight or more channels total)  
may not have the same degree of sampling match.  
As a result of manufacturing variations, differences in  
internal propagation delay of the internal CLK signal  
coupled with differences of the arrival of the external  
CLK signal to each device may cause larger sampling  
match errors. Equal length CLK traces or external  
clock distribution devices can be used to reduce the  
sampling match error between devices.  
In operation, the input signal is sampled by the  
modulator at a high rate (typically 64x higher than the  
final output data rate). The quantization noise of the  
modulator is moved to a higher frequency range  
where the internal digital filter removes it.  
Oversampling results in very low levels of noise  
within the signal passband.  
FREQUENCY RESPONSE  
The digital filter sets the overall frequency response.  
The filter uses a multi-stage FIR topology to provide  
linear phase with minimal passband ripple and high  
stop band attenuation. The filter coefficients are  
identical to the coefficients used in the ADS1271. The  
oversampling ratio of the digital filter (that is, the ratio  
of the modulator sampling to the output data rate, or  
fMOD/fDATA) is a function of the selected mode, as  
shown in Table 2.  
Since the input signal is sampled at a very high rate,  
input signal aliasing does not occur until the input  
signal frequency is at the modulator sampling rate.  
This architecture greatly relaxes the requirement of  
external antialiasing filters because of the high  
modulator sampling rate.  
SAMPLING APERTURE MATCHING  
Table 2. Oversampling Ratio versus Mode  
The ADS1274/78 converters operate from the same  
CLK input. The CLK input controls the timing of the  
modulator sampling instant. The converter is  
designed such that the sampling skew, or modulator  
sampling aperture match between channels, is  
MODE SELECTION  
High-Speed  
OVERSAMPLING RATIO (fMOD/fDATA)  
64  
128  
64  
High-Resolution  
Low-Power  
Low-Speed  
64  
21  
Copyright © 2007, Texas Instruments Incorporated  
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Product Folder Link(s): ADS1274 ADS1278  
 
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