欢迎访问ic37.com |
会员登录 免费注册
发布采购

ADS1255IDB 参数 Datasheet PDF下载

ADS1255IDB图片预览
型号: ADS1255IDB
PDF下载: 下载PDF文件 查看货源
内容描述: 极低噪声, 24位模拟数字转换器 [Very Low Noise, 24-Bit Analog-to-Digital Converter]
分类和应用: 转换器
文件页数/大小: 39 页 / 422 K
品牌: BB [ BURR-BROWN CORPORATION ]
 浏览型号ADS1255IDB的Datasheet PDF文件第1页浏览型号ADS1255IDB的Datasheet PDF文件第2页浏览型号ADS1255IDB的Datasheet PDF文件第4页浏览型号ADS1255IDB的Datasheet PDF文件第5页浏览型号ADS1255IDB的Datasheet PDF文件第6页浏览型号ADS1255IDB的Datasheet PDF文件第7页浏览型号ADS1255IDB的Datasheet PDF文件第8页浏览型号ADS1255IDB的Datasheet PDF文件第9页  
ꢐ ꢕꢙ ꢚꢋ ꢛꢛ  
ꢐ ꢕꢙ ꢚꢋ ꢛꢜ  
www.ti.com  
SBAS288D − JUNE 2003 − REVISED AUGUST 2004  
ELECTRICAL CHARACTERISTICS  
All specifications at −40°C to +85°C, AVDD = +5V, DVDD = +1.8V, f  
= 7.68MHz, PGA = 1, and V  
= +2.5V, unless otherwise noted.  
CLKIN  
REF  
TYP  
PARAMETER  
Analog Inputs  
Full-scale input voltage (AIN − AIN )  
TEST CONDITIONS  
MIN  
MAX  
UNIT  
2V  
/PGA  
REF  
V
V
V
P
N
Buffer off  
Buffer on  
AGND − 0.1  
AVDD + 0.1  
AVDD − 2.0  
64  
Absolute input voltage  
(AIN0-7, AINCOM to AGND)  
AGND  
1
Programmable gain amplifier  
Buffer off, PGA = 1, 2, 4, 8, 16  
150/PGA  
kΩ  
kΩ  
MΩ  
µA  
µA  
µA  
Buffer off, PGA = 32, 64  
(1)  
4.7  
80  
0.5  
2
Differential input impedance  
Sensor detect current sources  
Buffer on, f  
50Hz  
DATA  
SDCS[1:0] = 01  
SDCS[1:0] = 10  
SDCS[1:0] = 11  
10  
System Performance  
Resolution  
24  
24  
Bit  
Bit  
No missing codes  
All data rates and PGA settings  
= 7.68MHz  
(2)  
SPS  
Data rate (f  
)
f
2.5  
30,000  
0.0010  
DATA  
CLKIN  
(3)  
Differential input, PGA = 1  
Differential input, PGA = 64  
After calibration  
0.0003  
0.0007  
%FSR  
Integral nonlinearity  
Offset error  
%FSR  
On the level of the noise  
PGA = 1  
100  
nV/°C  
nV/°C  
%
Offset drift  
PGA = 64  
4
After calibration, PGA = 1, Buffer on  
After calibration, PGA = 64, Buffer on  
PGA = 1  
0.005  
Gain error  
Gain drift  
0.03  
%
0.8  
ppm/°C  
ppm/°C  
dB  
PGA = 64  
0.8  
(4)  
(5)  
= 30kSPS  
Common-mode rejection  
Noise  
f
= 60Hz, f  
DATA  
95  
60  
110  
CM  
See Noise Performance Tables  
AVDD power-supply rejection  
DVDD power-supply rejection  
Voltage Reference Inputs  
5% in AVDD  
10% in DVDD  
70  
dB  
dB  
100  
Reference input voltage (V  
)
V
VREFP − VREFN  
0.5  
2.5  
2.6  
V
V
REF  
REF  
Buffer off  
Buffer on  
Buffer off  
Buffer on  
AGND − 0.1  
AGND  
VREFP − 0.5  
VREFP − 0.5  
AVDD + 0.1  
AVDD − 2.0  
Negative reference input (VREFN)  
Positive reference input (VREFP)  
(6)  
V
VREFN + 0.5  
VREFN + 0.5  
V
(6)  
V
Voltage reference impedance  
f
= 7.68MHz  
18.5  
kΩ  
CLKIN  
Digital Input/Output  
DIN, SCLK, XTAL1/CLKIN,  
SYNC/PDWN, CS, RESET  
0.8 DVDD  
5.25  
V
V
IH  
D0/CLKOUT, D1, D2, D3  
0.8 DVDD  
DGND  
DVDD  
V
V
V
V
V
0.2 DVDD  
IL  
I
I
= 5mA  
= 5mA  
0.8 DVDD  
V
OH  
OL  
OH  
OL  
0.2 DVDD  
V
Input hysteresis  
Input leakage  
0.5  
V
0 < V  
DIGITAL INPUT  
External crystal between XTAL1 and  
XTAL2  
< DVDD  
10  
10  
10  
µA  
2
7.68  
7.68  
MHz  
MHz  
Master clock rate  
External oscillator driving CLKIN  
0.1  
3
 复制成功!