ADS1230
www.ti.com
SBAS366–OCTOBER 2006
APPLICATION EXAMPLES
FSLC
ǒ Ǔ
FSAD
BIT
ǒ
EffǓ
Noise−Free Counts + 2
Weigh Scale System
Where:
Figure 31 shows a typical ADS1230 hook-up as part
of a weigh scale system. In this setup, the ADS1230
is configured at a 10SPS data rate. Note that the
internal oscillator is used by grounding the CLKIN
pin. The user can also apply a 4.9152MHz clock to
the CLKIN pin. For a typical 2mV/V load cell, the
maximum output signal is approximately 10mV for a
single +5V excitation voltage. The ADS1230 can
achieve 17.5 noise-free bits at 10SPS when
BITEFF = effective noise-free bits (17.5 + 1 bit
from software filtering/averaging)
FSLC = full-scale output of the load cell (10mV)
FSAD = full-scale input of the ADS1230 (39mV,
when PGA = 128)
Therefore:
10mV
39mV
(17.5)1)
Noise−Free Counts + ǒ2
Ǔ
ǒ Ǔ+ 95, 058
PGA
=
128.
With
(typically
the
extra
done
software
by
filtering/averaging
a
microprocessor), an extra bit can be expected.
With +5V supply voltage, 95,058 noise-free counts
can be expected from the ADS1230.
2.7V to 5.3V
0.1mF
12
AVDD
1
VDD
DVDD
10
REFP
CAP
5
16
15
14
DRDY/DOUT
SCLK
0.1mF
6
CAP
-
+
MSP430x4xx
or Other
PDWN
ADS1230
7
8
AINP
AINN
Microprocessor
4
3
GAIN
CLKIN
13
SPEED
9
REFN
GND
AGND
11
DGND
2, 4
Figure 31. Weigh Scale Application
20
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