The common-mode and differential input impedances are
different. For a gain setting of PGA, the differential input
impedance is typically:
RESET AND POWER-UP
When the ADS1100 powers up, it automatically performs a
reset. As part of the reset, the ADS1100 sets all of the bits
in the configuration register to their default setting.
2.4MΩ / PGA
The ADS1100 responds to the I2C General Call Reset
command. When the ADS1100 receives a General Call
Reset, it performs an internal reset, exactly as though it had
just been powered on.
The common mode impedance is typically 8MΩ.
The typical value of the input impedance often cannot be
neglected. Unless the input source has a low impedance, the
ADS1100’s input impedance may affect the measurement
accuracy. For sources with high output impedance, buffering
may be necessary. Bear in mind, however, that active buffers
introduce noise, and also introduce offset and gain errors. All
of these factors should be considered in high-accuracy
applications.
I2C INTERFACE
The ADS1100 communicates through an I2C (Inter-Inte-
grated Circuit) interface. The I2C interface is a 2-wire open-
drain interface supporting multiple devices and masters on a
single bus. Devices on the I2C bus only drive the bus lines
LOW, by connecting them to ground; they never drive the
bus lines HIGH. Instead, the bus wires are pulled HIGH by
pull-up resistors, so the bus wires are HIGH when no device
is driving them LOW. This way, two devices cannot conflict;
if two devices drive the bus simultaneously, there is no driver
contention.
Because the clock generator frequency drifts slightly with
temperature, the input impedances will also drift. For many
applications, this input impedance drift can be neglected, and
the typical impedance values above can be used.
ALIASING
If frequencies are input to the ADS1100 which exceed half
the data rate, aliasing will occur. To prevent aliasing, the
input signal must be bandlimited. Some signals are inher-
ently bandlimited, for example, a thermocouple’s output,
which has a limited rate of change, but may nevertheless
contain noise and interference components. These can fold
back into the sampling band just as any other signal can.
Communication on the I2C bus always takes place between
two devices, one acting as the master and the other acting
as the slave. Both masters and slaves can read and write,
but slaves can only do so under the direction of the master.
Some I2C devices can act as masters or slaves, but the
ADS1100 can only act as a slave device.
An I2C bus consists of two lines, SDA and SCL. SDA carries
data; SCL provides the clock. All data is transmitted across
the I2C bus in groups of eight bits. To send a bit on the I2C
bus, the SDA line is driven to the bit’s level while SCL is
LOW. (A LOW on SDA indicates a zero bit; a HIGH indicates
a one bit.) Once the SDA line has settled, the SCL line is
brought HIGH, then LOW. This pulse on SCL clocks the SDA
bit into the receiver’s shift register.
The ADS1100’s digital filter provides some attenuation of
high frequency noise, but the filter’s sinc1 frequency re-
sponse cannot completely replace an anti-aliasing filter;
some external filtering may still be needed. For many appli-
cations, a simple RC filter will suffice.
When designing an input filter circuit, remember to take the
interaction between the filter network and the input imped-
ance of the ADS1100 into account.
The I2C bus is bidirectional: the SDA line is used both for
transmitting and receiving data. When a master reads from
a slave, the slave drives the data line; when a master sends
to a slave, the master drives the data line. The master always
drives the clock line. The ADS1100 never drives SCL,
because it cannot act as a master. On the ADS1100, SCL is
an input only.
USING THE ADS1100
OPERATING MODES
The ADS1100 operates in one of two modes: continuous
conversion and single conversion.
In continuous conversion mode, the ADS1100 continuously
performs conversions. Once a conversion has been com-
pleted, the ADS1100 places the result in the output register,
and immediately begins another conversion. When the
ADS1100 is in continuous conversion mode, the ST/BSY bit
in the configuration register always reads 1.
Most of the time the bus is idle, no communication is taking
place, and both lines are HIGH. When communication is
taking place, the bus is active. Only master devices can start
a communication. They do this by causing a start condition
on the bus. Normally, the data line is only allowed to change
state while the clock line is LOW. If the data line changes
state while the clock line is HIGH, it is either a start condition
or its counterpart, a stop condition. A start condition is when
the clock line is HIGH and the data line goes from HIGH to
LOW. A stop condition is when the clock line is HIGH and the
data line goes from LOW to HIGH.
In single conversion mode, the ADS1100 waits until the
ST/BSY bit in the conversion register is set to 1. When this
happens, the ADS1100 powers up and performs a single
conversion. After the conversion completes, the ADS1100
places the result in the output register, resets the ST/BSY bit
to 0 and powers down. Writing a 1 to ST/BSY while a
conversion is in progress has no effect.
After the master issues a start condition, it sends a byte
which indicates which slave device it wants to communicate
with. This byte is called the address byte. Each device on an
I2C bus has a unique 7-bit address to which it responds.
(Slaves can also have 10-bit addresses; see the I2C specifi-
When switching from continuous conversion mode to single
conversion mode, the ADS1100 will complete the current
conversion, reset the ST/BSY bit to 0 and power down.
ADS1100
8
SBAS239
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