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ADC614KH 参数 Datasheet PDF下载

ADC614KH图片预览
型号: ADC614KH
PDF下载: 下载PDF文件 查看货源
内容描述: [ADC, Flash Method, 14-Bit, 1 Func, 1 Channel, Parallel, Word Access, Hybrid, CDIP46, CERAMIC, DIP-46]
分类和应用: 转换器
文件页数/大小: 15 页 / 197 K
品牌: BB [ BURR-BROWN CORPORATION ]
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SPECIFICATIONS (CONT)  
ELECTRICAL (FULL TEMPERATURE RANGE SPECIFICATIONS)  
At ±VCC = +15V, +VDD1 = +5V, –VDD2 = –5.2V, RS = 50, 5.12MHz sampling rate, output data latched with the convert command, 15-minute warmup, and TC  
=
TMIN to TMAX, unless otherwise noted.  
ADC614JH  
TYP  
ADC614KH  
TYP  
PARAMETER  
CONDITIONS  
MIN  
MAX  
MIN  
MAX  
UNITS  
TEMPERATURE RANGE  
Specification  
TCASE  
0
+85  
°C  
TRANSFER CHARACTERISTICS  
Accuracy  
Gain Error  
Input Offset  
Differential Linearity Error  
DC  
DC  
±0.9  
±0.5  
1.4  
±2  
±2  
2.0  
±0.4  
±0.2  
1.0  
±1.5  
±1.5  
1.5  
%FSR(1)  
%FSR  
LSB  
f = 100kHz:  
100% of all Codes  
No Missing Codes  
Power Supply Rejection  
Guaranteed  
±0.04  
±0.05  
±0.004  
±0.02  
Guaranteed  
+VCC = ±5%  
–VCC = ±5%  
+VDD1 = ±5%  
–VDD2 = ±5%  
±0.2  
±0.2  
±0.1  
±0.1  
%FSR/%  
%FSR/%  
%FSR/%  
%FSR/%  
CONVERSION CHARACTERISTICS  
Sample Rate  
Pipeline Delay  
DC  
5.12M  
Samples/s  
LSB  
1, 2, or 3 Convert Command Periods  
DYNAMIC CHARACTERISTICS(2)  
Differential Linearity Error  
f = 2.3MHz:  
1.4  
2.0  
1.0  
1.5  
100% of all Codes  
Spurious-Free Dynamic Range (SFDR)  
f = 2.3MHz (–0.5dB)  
f = 100kHz (–0.5dB)  
Two-Tone Intermodulation Distortion(6)  
f = 2.20MHz (–6.5dB)  
f = 2.3MHz (–6.5dB)  
Signal-to-Noise Ratio (SNR)  
f = 2.3MHz (–0.5dB)  
f = 100kHz (–0.5dB)  
SINAD  
fS = 5.12MHz  
fS = 5.12MHz  
fS = 5.12MHz  
fS = 5.12MHz  
75  
77  
78  
80  
dBFS(3)  
dBFS(3)  
–80  
–71  
–84  
–76  
dBFS(3)  
69  
72  
71  
74  
dB  
dB  
f = 2.3MHz (–0.5dB)  
f = 100kHz (–0.5dB)  
Aperature Delay Time  
Aperature Jitter  
68  
71  
–6  
3
70  
73  
dB  
dB  
ns  
–25  
+25  
10  
ps rms  
Analog Input Bandwidth (–3dB)  
Small Signal  
Full Power  
–20dB Input  
0dB Input  
2x Full Scale Input  
60  
30  
220  
MHz  
MHz  
ns  
Overload Recovery Time  
OUTPUTS  
Logic Levels  
Logic “LO”  
IOL = –3.2mA  
Logic “HI”  
0
+0.3  
+3.5  
+0.8  
+5.0  
V
V
+2.4  
IOH = 160µA  
EOC Delay Time  
Tri-State Enable/Disable TIme  
Data Out to DV  
IOL = –6.4mA,  
50% In to 50% Out  
See Figure 13; Timing Typically Within ±20% Over Temperature  
42 100  
ns  
Data Valid Pulse Width  
See Figure 13; Timing Typically Within ±20% Over Temperature  
POWER SUPPLY REQUIREMENTS  
Supply Currents: +ICC  
–ICC  
Operating  
Operating  
+65  
–61  
+305  
–550  
6.1  
+80  
–80  
+333  
–630  
6.5  
mA  
mA  
mA  
mA  
W
(4)  
+IDD1  
–IDD2  
(5)  
Power Consumption  
Same specifications as next grade to the left.  
NOTES: (1) FSR: Full-Scale Range = 2.5Vp-p. (2) Units with lower distortion are available on special order; inquire. (3) dBFS = level referred to full scale. The input  
signal is within 1 dB of full scale; f = input frequency; fs = sampling frequency. (4) Pins 3 and 30 (analog typically draw 80% of the total +5V current. Pin 21 (digital) typically  
draws 20%. (5) Pin 6 (analog) typically draws 45% of the total –5.2V current. Pin 31 (digital) typically draws 55%. (6) SNR and two-tone intermodulation distortion are  
guaranteed but not 100% tested.  
®
3
ADC614