AZP51
AZP52
AZP53
AZP54
SIGNAL DESCRIPTION
PIN/PAD
D
Q,Q¯
EN
FUNCTION
Sine or LVCMOS Input
LVPECL Outputs
Output Enable
DIV_SEL Divide Select (AZP53 only)
EN_SEL
VDD
Enable Select (AZP53 only)
Positive Supply
GND
Negative Supply (Ground)
DIV-SEL OPERATION
PART
NUMBER
AZP51
AZP54
AZP52
DIV-SEL
DIVIDE
RATIO
2
-
÷1
2
-
÷2
÷1
÷2
NC1,L
H
AZP53
1. NC – no connection
2. Internally connected
FUNCTIONAL OPERATION
INPUTS
EN
OUTPUTS
PART
NUMBER
EN LOGIC
Active High4
Active Low3
Active High4
Active Low3
PULLUP/
PULLDOWN
EN_SEL7
EN
D
Q
Q¯
L
H
L8
H8
Z6
L8
H8
Z6
L8
H8
Z6
L
H8
L8
Z6
H8
L8
Z6
H8
L8
Z6
H
NC1, H
AZP51
AZP52
2
-
Pullup
Pulldown
Pullup
L
X5
L
NC1, L
H
NC1, H
NC1, H
L
H
X5
L
AZP53
AZP54
H
L
X5
L
NC1, L
H
2
-
Pulldown
H
H
L
X5
Z6
Z6
1. NC – no connection
2. Internally tied
3. Active Low: Output enabled when EN low, Tri-state when EN high
4. Active High: Output enabled when EN high, Tri-state when EN low
5. X – Don’t care
6. Z – High impedance
7. EN_SEL input has an internal pullup resistor
8. ÷1 modes only
December 2009 * REV - 2
www.azmicrotek.com
3
AZM [ ARIZONA MICROTEK, INC ]
