Arizona Microtek, Inc.
AZ100EL16VO
LVPECL Oscillator Gain Stage
& Buffer with Enable
ENGINEERING NOTES
The AZ100EL16VO provides an active low enable (E¯N¯) which can be driven with an ECL/PECL signal or a CMOS logic
signal. When E¯N¯ is LOW or floating (NC), input data is passed to both sets of outputs. When E¯N¯ is HIGH, the QHG/Q¯HG
outputs will be forced LOW/HIGH respectively, while input data will continue to be passed to the Q/Q¯ outputs.
The AZ100EL16VO also provides a VBB output that supports 1.5mA sink/source current. When used, the VBB pin should
be bypassed to ground or VCC via a 0.01µF capacitor.
Any used output must have an external pull down resistor. For 3.3V operation, an 180Ω resistor to VEE is recommended if
an AC coupled load is present. At 5.0V, a 330Ω resistor is recommended for the AC load case. Alternately, a 50Ω load
terminated to VCC - 2V or the Thevenin equivalent may be driven directly. Unused outputs may be left floating (NC).
10k temperature compensation is offered on the AZ100LVEL16VOL. If this mode is desired, connect the 10k pin to VEE.
The connection must be less than 1Ω.
NOTE: Specifications in ECL/PECL tables are valid when thermal equilibrium is established.
D
EN
Q
Q
QHG
QHG
Figure 6 - AZ100EL16VO Timing Diagram
www.azmicrotek.com
+1-480-962-5881
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May 2012, Rev 2.0
AZM [ ARIZONA MICROTEK, INC ]
