Arizona Microtek, Inc.
AZ100EL16VO
LVPECL Oscillator Gain Stage
& Buffer with Enable
PIN DESCRIPTION AND CONFIGURATION
Table 1 - Pin description for MLP8 package
Pin
1
Name
Q¯
Type
Output
Input
Function
Inverting PECL Output
Data Input
D
1
2
3
Q
8
7
2
D
Leave Pad
open or
connect to
VEE
VBB
VCC
QHG
3
VBB
E¯N¯
Output
Input
Reference Voltage
Output Enable
4
6
5
EN
5
VEE
Q¯HG
QHG
VCC
Power
Output
Output
Power
Negative Supply
6
High Gain Inverting PECL Output
High Gain PECL Output
Positive Supply
4
VEE
QHG
7
8
Figure 1 – Pin configuration for
AZ100EL16VON (MLP8)
Table 2 - Pin description for MLP8 package
Pin
1
Name
D
Type
Input
Function
Data Input
1
VCC
QHG
QHG
Q
D
8
2
VBB
E¯N¯
Output
Input
Reference Voltage
Output Enable
Leave Pad
7
6
5
2
3
3
open or
connect to
VEE
4
VEE
Q¯HG
QHG
VCC
Q¯
Power
Output
Output
Power
Output
Negative Supply
VBB
5
High Gain Inverting PECL Output
High Gain PECL Output
Positive Supply
6
VEE
4
EN
7
8
Inverting PECL Output
Figure 2 – Pin configuration for
AZ100EL16VONB (MLP8)
Table 3 - Pin description for MSOP8 package
Pin
1
Name
Q¯
Type
Output
Input
Function
Inverting PECL Output
Data Input
1
Q
D
8
7
6
5
VCC
QHG
QHG
2
D
2
3
4
3
VBB
E¯N¯
Output
Input
Reference Voltage
Output Enable
4
VBB
5
VEE
Q¯HG
QHG
VCC
Power
Output
Output
Power
Negative Supply
6
High Gain Inverting PECL Output
High Gain PECL Output
Positive Supply
EN
VEE
7
8
Figure 3 – Pin configuration for
AZ100EL100VOT (MSOP8)
www.azmicrotek.com
+1-480-962-5881
2
Request a Sample
May 2012, Rev 2.0