Arizona Microtek, Inc.
AZ100EL16VO
LVPECL Oscillator Gain Stage
& Buffer with Enable
Table 4 - Pin description for MSOP10 package
Pin
1
Name
Q
Type
Output
Output
Input
Function
1
10
Q
Q
D
VCC
PECL Output
Inverting PECL Output
Data Input
2
Q¯
9
8
7
6
QHG
2
3
3
D
4
D¯
Input
Inverting Data Input
Reference Voltage
Output Enable
QHG
VEE
EN
5
VBB
E¯N¯
VEE
Q¯HG
QHG
VCC
Output
Input
6
4
5
D
7
Power
Output
Output
Power
Negative Supply
8
High Gain Inverting PECL Output
High Gain PECL Output
Positive Supply
VBB
9
10
Figure 4 - Pin configuration for
AZ100EL16VOU (MSOP10)
Table 5 - Pin description for MLP16 package
Pin
1
Name
NC
D
Type
Function
2
Input
Input
Data Input
VCC
13
Q
NC
14
Q
3
D¯
Inverting Data Input
Reference Voltage
Output Enable
15
16
4
VBB
E¯N¯
NC
VEE
10k
NC
Q¯HG
QHG
NC
VCC
NC
Q
Output
Input
5
NC
1
NC
12
11
6
7
Power
Input
Negative Supply
10k Enable
Leave Pad
Open or
Connect to
VEE
QHG
QHG
NC
2
3
4
D
8
9
10
9
D
10
11
12
13
14
15
16
Output
Output
High Gain Inverting PECL Output
High Gain PECL Output
VBB
7
8
5
6
Power
Positive Supply
10k
EN
NC VEE
Output
Output
PECL Output
Figure 5 - Pin configuration for
AZ100EL16VOL (MLP16)
Q¯
Inverting PECL Output
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May 2012, Rev 2.0