Table 1. Effects of Common Mode Pulse Direction on Transient I
LED
If |I | < |I |,
If |I | > |I |,
LP LN
LP
LN
LED I Current
LED I Current
F
F
If dV /dt Is:
then I Flows:
and I Flows:
Is Momentarily:
Is Momentarily:
CM
LP
LN
positive (>0)
away from LED
anode through CLA
away from LED
cathode through CLC
increased
decreased
negative (<0)
toward LED
anode through CLA
toward LED
cathode through CLC
decreased
increased
Glitch free power-up and power-down
Slew-rate controlled output
Upon power-up or power-down of the optocoupler,
Typically, the output slew rate (rise and fall time) will vary
glitches produced in the output are undesirable. Glitches with the output load, as more time is needed to charge up
can lead to false data in the optocoupler application. the higher load. The propagation delay and the PWD will
ACPL-061L/ACPL-C61L/ACNW261L has a feature that
increase with the load capacitance. This will be an issue
holds the output in a known state until VDD is at a safe especially in parallel communication because different
level. Figure 14 and 15 show typical output waveforms communication line will have different load capacitances.
However, ACPL-061L/ACPL-C61L/ACNW261L has built in
slew-rate controlled feature, to ensure that the output rise
and fall time remain stable across wide load capacitance.
during power-up and power-down.
VDD2 = 2 V (typ)
VDD2
VDD2 = 1 V (typ)
VDD2
VDD2 = 1 V (typ)
High
Impedence
Output
High
Impedence
High
Impedence
Output
High
Impedence
discharge delay,
depending on the power
supply slew rate
500 µs
500 µs
i. LED is oꢀ.
ii. LED is on.
Figure 14. VDD Ramp when LED is off.
Figure 15. VDD Ramp when LED is on.
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Data subject to change. Copyright © 2005-2014 Avago Technologies. All rights reserved.
AV02-3195EN - April 10, 2014