WIDEBODY
(mW)
0.8
0.7
0.6
0.5
0.4
0.3
0.2
1000
P
S
900
800
700
600
500
400
300
200
I
(mA)
S
V
= 18 V
CC
V
= 5 V
CC
0.1
0
100
0
0
25
50 75 100 125 150 175
0
2
4
6
8
10 12 14 16
T
– CASE TEMPERATURE – °C
S
I
– FORWARD CURRENT
F
Figure 10. Logic low supply current vs. forward current
Figure 11. Thermal derating curve, dependence of safety limiting value
with case temperature per IEC/EN/DIN EN 60747-5-2
I
F
I
PULSE
GEN.
F
0
8
7
6
5
+5 V
1
3
ꢀ
4
Z
= 50 Ω
O
5 V
V
O
t = 5 ns
r
R
L
10% DUTY CYCLE
I/f < 100 μs
(SATURATED
RESPONSEꢁ
1.5 V
1.5 V
V
O
V
OL
0.1 μF
I
F
MONITOR
t
t
PHL
PLH
C
= 15 pF*
L
R
M
5 V
* INCLUDES PROBE AND
FIXTURE CAPACITANCE
V
O
90%
10%
90%
10%
(NON-SATURATED
RESPONSEꢁ
t
f
t
r
Figure 12. Switching test circuit
R
(SEE NOTE 6ꢁ
CC
I
t , t = 16 ns
8
7
6
5
F
1
3
ꢀ
4
+5 V
r
f
10 V
90% 90%
V
CM
B
0 V
10%
10%
R
L
t
r
t
A
f
V
O
V
5 V
V
O
V
FF
SWITCH AT A: I = 0 mA
F
V
V
+
O
CM
OL
–
SWITCH AT B: I = 1.6 mA
F
PULSE GEN.
Figure 13. Test circuit for transient immunity and typical waveforms
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Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies Limited in the United States and other countries.
Data subject to change. Copyright © 2005-2012 Avago Technologies Limited. All rights reserved. Obsoletes AV01-0543EN
AV02-1359EN - July 27, 2012
AVAGO [ AVAGO TECHNOLOGIES LIMITED ]
