AUSTIN SEMICONDUCTOR, INC.
FLASH
AS8FLC1M32
Austin Semiconductor, Inc.
Erase / Program Operations
Parameter
JEDEC
Speed Options
Std
Description
55
60
70
90 Unit
Write Cycle Time1
Address Setup Time
Address Hold Time
Data Setup Time
Data Hold Time
tAVAV
tAVWL
tWLAX
tDVWH
tWHDX
tWC
55
60
70
90
tAS
tAH
0
45
tDS
35
35
35
45
tDH
tOES
0
0
Output Enable Setup Time
ns
Min
Read Recovery Time Before Write
(OE# High to WE# Low)
tGHWL
tGHWL
0
0
0
tELWL
tWHEH
tWLWH
tWHWL
tCS
tCH
CE# Setup Time
CE# Hold Time
tWP
Write Pulse Width
35
30
tWPH
tSR/W
Write Pulse Width High
Latency Between Read and Write Operations
20
5
ns
µs
Byte
Programming Operation2
Word
Sector Erase Operation2
tWHWH1
tWHWH2
tWHWH1
Typ
7
tWHWH2
tVCS
0.7
sec
µs
Vcc Setup Time1
Min
Min
Max
50
0
tRB
Recovery Time from RY/BY#
Program / Erase Valid to RY / BY# Delay
ns
tBUSY
90
Notes:
1.
2.
Not 100% Tested
See Erase and Programming Performance for more information
Program Operation Timings
Program Command Sequence (last two cycles)
Read Status Data (last two cycles)
t
t
AS
PA
WC
Addresses
555h
PA
PA
t
AH
CE#
OE#
t
CH
t
WHWH1
t
WP
WE#
t
WPH
t
CS
t
DS
A0h
t
D
PD
Status
D
Data
OUT
t
t
RB
BUSY
RY/BY#
V
CC
t
VCS
Notes
1. PA = program address, PD = program data, D
is the true data at the program address.
OUT
2. Illustration shows device in word mode
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS8FLC1M32B
Rev. 3.3 05/08
19
AUSTIN [ AUSTIN SEMICONDUCTOR ]
