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AS8F128K32Q-60/IT 参数 Datasheet PDF下载

AS8F128K32Q-60/IT图片预览
型号: AS8F128K32Q-60/IT
PDF下载: 下载PDF文件 查看货源
内容描述: 128K ×32的FLASH快闪存储器阵列 [128K x 32 FLASH FLASH MEMORY ARRAY]
分类和应用: 闪存存储
文件页数/大小: 22 页 / 390 K
品牌: AUSTIN [ AUSTIN SEMICONDUCTOR ]
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FLASH  
AS8F128K32  
Austin Semiconductor, Inc.  
Low VCC Write Inhibit  
Sector Protection/Unprotection  
The hardware sector protection feature disables both  
program and erase operations in any sector. The hardware  
sector unprotection feature re-enables both program and erase  
operations in previously protected sectors.  
When VCC is less than VLKO, the device does not accept  
any write cycles. This protects data during VCC power-up and  
power-down. The command register and all internal program/  
erase circuits are disabled, and the device resets. Subsequent  
writes are ignored until VCC is greater than VLKO. The system  
must provide the proper signals to the control pins to prevent  
unintentional writes when VCC is greater than VLKO  
Sector protection/unprotection must be implemented  
using programming equipment. The procedure requires a high  
voltage (VID) on address pin A9 and the control pins.  
The device is shipped with all sectors unprotected. It is  
possible to determine whether a sector is protected or  
unprotected. See “Autoselect Mode” for details.  
.
Write Pulse “Glitch” Protection  
Noise pulses of less than 5 ns (typical) on OE\, CEx\ or  
WEx\ do not initiate a write cycle.  
Hardware Data Protection  
The command sequence requirement of unlock cycles for  
programming or erasing provides data protection against  
inadvertent writes (refer to the Command Definitions table). In  
addition, the following hardware data protection measures  
prevent accidental erasure or programming, which might  
otherwise be caused by spurious system level signals during  
Logical Inhibit  
Write cycles are inhibited by holding any one of OE\ = VIL,  
CEx\ = VIH or WEx\ = VIH. To initiate a write cycle, CEx\ and  
WEx\ must be a logical zero while OE\ is a logical one.  
VCC power-up and power-down transitions, or from system  
noise.  
Power-Up Write Inhibit  
If WEx\ = CEx\ = VIL and OE\ = VIH during power up, the device  
does not accept commands on the rising edge of WEx\. The  
internal state machine is automatical ly reset to reading array  
data on power-up.  
TABLE 3: Autoselect Codes (High Voltage Method)  
I/O0 to I/O7  
I/O8 to I/O15  
I/O16 to I/O23  
I/O24 to I/O31  
A16 A13  
to to  
A14 A10  
A5  
A8 to  
A7  
DESCRIPTION  
CEx\ OE\ WEx\  
A9  
A6 to A1 A0  
A2  
L
L
L
L
H
H
X
X
X
X
V
V
X
X
L
L
X
X
L
L
L
01h  
ID  
Manufacturer ID: AMD  
Device ID: AM29F010B  
H
20h  
ID  
01h (protected)  
L
L
H
SA  
X
V
X
L
X
H
L
ID  
00h  
(unprotected)  
Sector Protection Verification  
LEGEND:  
L = Logic Low = VIL, H = Logic High = VIH, SA = Sector Address, X = Don’t care.  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
AS8F128K32  
Rev. 2.0 5/03  
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